Semiconductor device and method

1. A method of manufacturing a semiconductor device, the method comprising:

epitaxially manufacturing a first source/drain region over a semiconductor substrate and adjacent to a first spacer over the semiconductor substrate, wherein the source/drain region has a different lattice constant than the semiconductor substrate, the first spacer adjacent to a gate electrode, wherein after the manufacturing the first source/drain region has a first surface facing the semiconductor substrate and a second facing opposite the first surface, the second surface extending from a first side of the first source/drain region to a second side of the first source/drain region opposite the first side, wherein both the first side and the second side face away from an interior of the first source/drain region the second surface being free from the first spacer;

forming an opening exposing the first source/drain region; and

implanting dopants into the first source/drain region and the first spacer after the forming the opening, wherein the implanting the dopants forms a first implantation region within the first spacer.

2. The method of claim 1 , wherein the dopants are n-type dopants or p-type dopants.

3. The method of claim 1 , wherein the forming the opening exposing the first source/drain region also removes a portion of the first spacer to form a first slanted sidewall.

4. The method of claim 3 , wherein the first slanted sidewall has an angle of between about 10° and about 85°.

5. The method of claim 3 , wherein the first implantation region has a thickness from a surface of the first slanted sidewall of between about 10 Å and about 50 Å.

6. The method of claim 1 , further comprising annealing the first source/drain region to activate the dopants, wherein the annealing the first source/drain region forms a second implantation region within the first spacer that at least partially overlaps the first implantation region.

7. The method of claim 1 , further comprising forming a conductive material within the opening.

8. A method of manufacturing a semiconductor device, the method comprising:

forming a gate stack over a semiconductor fin, the gate stack comprising a gate electrode;

forming a first spacer over the semiconductor fin and adjacent to the gate stack;

removing a portion of the semiconductor fin exposed by the first spacer;

regrowing a source/drain region;

forming an opening to expose a portion of the source/drain region;

forming an implantation mask over the gate stack, wherein the portion of the source/drain region exposed by the opening remains exposed after the forming the implantation mask; and

directly implanting first dopants into both the source/drain region and the first spacer.

9. The method of claim 8 , wherein the forming the opening additionally angles a sidewall of the first spacer.

10. The method of claim 9 , wherein the sidewall of the first spacer has a first angle of between about 10° and about 85° after the forming the opening.

11. The method of claim 10 , wherein the directly implanting the first dopants forms a first implantation region within the first spacer adjacent to the sidewall.

12. The method of claim 8 , further comprising filling the opening with a conductive material after the directly implanting the first dopants.

13. The method of claim 8 , wherein the first spacer comprises silicon nitride and the first dopants are dopants with a first conductivity.

14. The method of claim 8 , further comprising annealing the source/drain region.

15. A method of manufacturing a semiconductor device, the method comprising:

forming a first spacer adjacent to a gate electrode over a substrate, wherein the forming the first spacer comprises forming a first sidewall facing away from the gate electrode, the forming the first sidewall comprising:

forming a first straight portion adjacent to the substrate, the first straight portion facing away from the gate electrode; and

forming a second straight portion adjacent to the first straight portion, wherein the second straight portion extends away from the substrate at a different angle than the first straight portion, the second straight portion facing away from the gate electrode;

epitaxially growing a source/drain region over the substrate and adjacent to the first straight portion, the epitaxially growing the source/drain region occurring after the forming the first straight portion and prior to the forming the second straight portion;

implanting through an implantation mask to form a first implantation region along the first sidewall in the second straight portion;

introducing ions to form a source/drain implantation region within the source/drain region adjacent to the first straight portion; and

forming a first contact in electrical connection with the source/drain region and extending at least partially over the first spacer.

16. The method of claim 15 , wherein the implanting to form the first implantation region implants first dopants to form both the first implantation region and the source/drain region.

17. The method of claim 15 , wherein the forming the first spacer forms silicon nitride.

18. The method of claim 15 , wherein the forming the first spacer forms the second straight portion to extend away from the substrate at an angle of between about 15° and about 85°.

19. The method of claim 15 , wherein the forming the first contact comprises depositing tungsten.

20. The method of claim 15 , further comprising depositing a dielectric material prior to the introducing ions.