Semiconductor device structure with a low-k spacer layer and method for manufacturing the same
View Patent ↗Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a fin structure over a substrate. The semiconductor device structure also includes a gate structure over the fin structure. The semiconductor device structure further includes a source/drain structure adjacent to the gate structure. In addition, the semiconductor device structure includes a first spacer layer between the gate structure and the source/drain structure, wherein the first spacer layer has a protruding portion extending towards the substrate.
1. A semiconductor device structure, comprising:
a fin structure over a substrate;
a gate structure over the fin structure;
a source/drain structure adjacent to the gate structure;
a first spacer layer between the gate structure and the source/drain structure, wherein the first spacer layer has a protruding portion extending towards the substrate; and
a second spacer layer directly under the first spacer layer, wherein a top surface of the second spacer layer is lower than a top surface of the source/drain structure.
2. The semiconductor device structure as claimed in claim 1 , wherein a dielectric constant of the second spacer layer is higher than a dielectric constant of the first spacer layer.
3. The semiconductor device structure as claimed in claim 2 , wherein a sidewall of the second spacer layer is covered by the protruding portion.
4. The semiconductor device structure as claimed in claim 2 , wherein a sidewall of the first spacer layer is in direct contact with the source/drain structure, and the protruding portion is in direct contact with the fin structure.
5. The semiconductor device structure as claimed in claim 2 , wherein the protruding portion is separated from the source/drain structure by the second spacer layer.
6. The semiconductor device structure as claimed in claim 2 , further comprising:
a third spacer layer directly under the protruding portion of the first spacer layer.
7. The semiconductor device structure as claimed in claim 6 , wherein a concentration of nitrogen in the second spacer layer is higher than a concentration of nitrogen in the third spacer layer.
8. The semiconductor device structure as claimed in claim 6 , wherein the first spacer layer, the second spacer layer and the third spacer layer are made of different materials.
9. The semiconductor device structure as claimed in claim 1 , wherein the protruding portion has an obtuse-angled corner.
10. A semiconductor device structure, comprising:
a gate structure over a substrate;
a source/drain structure adjacent to the gate structure;
a first spacer layer along a sidewall of the gate structure;
a second spacer layer directly under the first spacer layer, wherein nitrogen in the second spacer layer has a first concentration; and
a third spacer layer directly under the first spacer layer,
wherein a top surface of the second spacer layer is lower than a top surface of the third spacer layer, and nitrogen in the third spacer layer has a second concentration that is higher than the first concentration.
11. The semiconductor device structure as claimed in claim 10 , wherein the top surface of the third spacer layer is lower than a top surface of the source/drain structure.
12. The semiconductor device structure as claimed in claim 10 , wherein a width of a top portion of the third spacer layer is less than a width of a bottom portion of the third spacer layer.
13. The semiconductor device structure as claimed in claim 10 , wherein a dielectric constant of the first spacer layer is lower than those of the second spacer layer and the third spacer layer.
14. The semiconductor device structure as claimed in claim 10 , wherein the first spacer layer has a tapered sidewall.
15. A semiconductor device structure, comprising:
a gate structure over a substrate;
a source/drain structure adjacent to the gate structure;
a first spacer layer along a sidewall of the gate structure;
a second spacer layer directly under the first spacer layer; and
a third spacer layer directly under the first spacer layer,
wherein a width of the second spacer layer is greater than a width of the third spacer layer, and a dielectric constant of the first spacer layer is lower than a dielectric constant of the second spacer layer and a dielectric constant of the third spacer layer.
16. The semiconductor device structure as claimed in claim 15 , wherein the second spacer layer has a first nitrogen concentration, and the third spacer layer has a second nitrogen concentration that is greater than the first nitrogen concentration.
17. The semiconductor device structure as claimed in claim 15 , wherein the first spacer layer is separated from the substrate by the second spacer layer and the third spacer layer.
18. The semiconductor device structure as claimed in claim 15 , wherein a sidewall surface of the third spacer layer is in direct contact with the first spacer layer.
19. The semiconductor device structure as claimed in claim 6 , wherein a dielectric constant of the third spacer layer is higher than a dielectric constant of the first spacer layer.
20. The semiconductor device structure as claimed in claim 6 , wherein a top surface of the third spacer layer is lower than the top surface of the source/drain structure.