IP Library › Granted Patent US 10,529,295
Granted Patent B2
US 10,529,295 · App. 15/980,269 · Granted Jan 7, 2020

Display apparatus and gate-driver on array control circuit thereof

Inventors: Chien-Chung Chen (Hsinchu, TW); Hsing-Shen Huang (Hsinchu, TW)
Assignee: RICHTEK TECHNOLOGY CORPORATION
G09G3/3674G09G2310/0213G09G2310/0289G09G2310/061G09G2310/08G09G2330/027G09G2354/00
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,529,295
App. No.
15/980,269
Granted
Jan 7, 2020
Kind
B2
Abstract

A display apparatus includes a timing controller and a gate-driver on array (GOA) control circuit. The timing controller generates a frame synchronization signal. The GOA control circuit is coupled to the timing controller and includes a scan signal management circuit and a level shifter. The scan signal management circuit generates a scan signal management signal according to the frame synchronization signal, a predetermined panel parameter, and an operation clock signal. The scan signal management circuit includes a storage unit which stores the predetermined panel parameter. The level shifter generates a scan control signal according to the scan signal management signal to control a GOA of a display panel circuit. The GOA generates a gate driving signal to control a vertical scan operation of the display panel circuit.

Claims (40)

1. A display apparatus, comprising:

a timing control circuit, configured to operably generate a frame synchronization signal; and

a gate-driver on array (GOA) control circuit which is coupled to the timing control circuit, including:

a scanning signal management circuit, configured to operably generate a scanning signal management signal according to the frame synchronization signal, a predetermined panel parameter and an operation clock signal, wherein the scanning signal management circuit includes a storage unit configured to store the predetermined panel parameter; and

a level shifter circuit, configured to operably generate a scanning control signal according to the scanning signal management signal to control a gate-driver on array of a display panel circuit, wherein the gate-driver on array generates a gate driving signal according to the scanning control signal to control a vertical scanning operation of the display panel circuit;

wherein the scanning control signal includes at least one of the following: (1) a GOA phase control signal for controlling a phase and/or a waveform of the gate driving signal; (2) a life extension control signal for controlling a life extension operation of the gate driving signal; and/or (3) a power off signal for controlling a power off operation of the gate driving signal;

wherein the predetermined panel parameter includes at least one of the following: (1) a phase number of the GOA phase control signal; (2) a phase overlay parameter of the GOA phase control signal; (3) a transient waveform parameter of the GOA phase control signal; (4) a life extension control signal related parameter; and/or (5) a power off signal related parameter.

2. The display apparatus of claim 1 , wherein the GOA control circuit further includes an oscillator which is configured to operably generate the operation clock signal.

3. The display apparatus of claim 2 , wherein the operation clock signal is synchronous with the frame synchronization signal.

4. The display apparatus of claim 2 , wherein the operation clock signal is synchronous or not synchronous with a vertical scanning frequency of the display panel circuit.

5. The display apparatus of claim 1 , wherein the timing control circuit provides the operation clock signal.

6. The display apparatus of claim 1 , wherein the operation clock signal is not provided from outside the GOA control circuit.

7. The display apparatus of claim 1 , wherein the predetermined panel parameter is one of the following: (1) a fixed value, (2) a selectable fixed value; or (3) an adjustable value; wherein the predetermined panel parameter is stored into the storage unit by a user in a setting stage.

8. The display apparatus of claim 1 , wherein the scanning signal management circuit further includes at least one of the following:

a phase number control unit, configured to operably determine the phase number of the GOA phase control signal;

a phase overlay control unit, configured to operably adjust the phase overlay among the phases of the GOA phase control signal;

a transient control unit, configured to operably control a transient waveform of the GOA phase control signal;

a blanking control unit, configured to operably control a horizontal blanking time or a vertical blanking time;

a life extension control unit, configured to operably generate the life extension control signal; and/or

a power off control unit, configured to operably generate the power off signal.

9. The display apparatus of claim 1 , wherein none of any signal lines connected between the timing control circuit and the GOA control circuit includes (1) a signal line dedicated only for transmitting the GOA phase control signal, (2) a signal line dedicated only for transmitting the life extension control signal, or (3) a signal line dedicated only for transmitting the power off signal.

10. The GOA control circuit of claim 1 , wherein the scanning signal management circuit further includes at least one of the following:

a phase number control unit, configured to operably determine the phase number of the GOA phase control signal;

a phase overlay control unit, configured to operably adjust the phase overlay among the phases of the GOA phase control signal;

a transient control unit, configured to operably control a transient waveform of the GOA phase control signal;

a blanking control unit, configured to operably control a horizontal blanking time or a vertical blanking time;

a life extension control unit, configured to operably generate the life extension control signal; and/or

a power off control unit, configured to operably generate the power off signal.

11. The GOA control circuit of claim 1 , wherein none of any signal lines connected between the timing control circuit and the GOA control circuit includes (1) a signal line directly corresponding to the GOA phase control signal, (2) a signal line directly corresponding to the life extension control signal, or (3) a signal line directly corresponding to the power off signal.

12. A gate-driver on array (GOA) control circuit for use in a display apparatus, the display apparatus including: a timing control circuit, configured to operably generate a frame synchronization signal; and the GOA control circuit, coupled to the timing control circuit, the GOA control circuit comprising:

a scanning signal management circuit, configured to operably generate a scanning signal management signal according to the frame synchronization signal, a predetermined panel parameter and an operation clock signal, wherein the scanning signal management circuit includes a storage unit which stores the predetermined panel parameter; and

a level shifter circuit, configured to operably generate a scanning control signal according to the scanning signal management signal to control a gate-driver on array of a display panel circuit, wherein the gate-driver on array generates a gate driving signal according to the scanning control signal to control a vertical scanning operation of the display panel circuit;

wherein the scanning control signal includes at least one of the following: (1) a GOA phase control signal for controlling a phase and/or a waveform of the gate driving signal; (2) a life extension control signal for controlling a life extension operation of the gate driving signal; and/or (3) a power off signal for controlling a power off operation of the gate driving signal;

wherein the predetermined panel parameter includes at least one of the following: (1) a phase number of the GOA phase control signal; (2) a phase overlay parameter of the GOA phase control signal; (3) a transient waveform parameter of the GOA phase control signal; (4) a life extension control signal related parameter; and/or (5) a power off signal related parameter.

13. The GOA control circuit of claim 12 , wherein the GOA control circuit further includes an oscillator which is configured to operably generate the operation clock signal.

14. The GOA control circuit of claims 13 , wherein the operation clock signal is synchronous or not synchronous with a vertical scanning frequency of the display panel circuit.

15. The GOA control circuit of claim 12 , wherein the timing control circuit provides the operation clock signal.

16. The GOA control circuit of claim 12 , wherein the operation clock signal is not provided from outside the GOA control circuit.

17. The GOA control circuit of claims 16 , wherein the operation clock signal is synchronous or not synchronous with a vertical scanning frequency of the display panel circuit.

18. The GOA control circuit of claim 12 , wherein the predetermined panel parameter is one of the following: (1) a fixed value, (2) a selectable fixed value; or (3) an adjustable value; wherein the predetermined panel parameter is stored into the storage unit by a user in a setting stage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2018
From: CHEN, CHIEN-CHUNG; HUANG, HSING-SHEN
To: RICHTEK TECHNOLOGY CORPORATION
Reel/Frame 045810/0488 →
Priority Claims (1)
TW 107104087 A · Feb 6, 2018 · national
Continuity (2)
Provisional Application 62521392 · Jun 17, 2017
Related Publication 20180366082A1 · Dec 20, 2018