IP Library Granted Patent US 10,535,698
Granted Patent B2
US 10,535,698 · App. 15/907,654 · Granted Jan 14, 2020

Image sensor with pad structure

Inventors: Yun-Wei Cheng (Taipei, TW); Chun-Hao Chou (Tainan, TW); Kuo-Cheng Lee (Tainan, TW); Hsun-Ying Huang (Tainan, TW); Yin-Chieh Huang (Tainan, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L27/14636H01L27/1463H01L27/1464H01L27/14683H01L27/14689
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Quick Facts
Patent No.
US 10,535,698
App. No.
15/907,654
Granted
Jan 14, 2020
Kind
B2
Abstract

The present disclosure relates to an image sensor with a pad structure formed during a front-end-of-line process. The pad structure can be formed prior to formation of back side deep trench isolation structures and metal grid structures. An opening is formed on a back side of the image sensor device to expose the embedded pad structure and to form electrical connections.

Claims (40)

1. A method of forming a semiconductor image sensor device, the method comprising:

forming a plurality of photo detectors in a semiconductor layer, wherein the plurality of photo detectors are configured to detect light that enters into the semiconductor layer through a first surface of the semiconductor layer;

etching the semiconductor layer to form a first opening in a second surface of the semiconductor layer, wherein the second surface is opposite to the first surface;

forming, in the first opening, a pad structure that comprises a metal fill;

disposing interconnect structures on the second surface of the semiconductor layer;

depositing an isolation material to form a plurality of deep trench isolation structures in the semiconductor layer; and

etching the semiconductor layer to form a second opening in the semiconductor layer to expose at least a portion of the pad structure, wherein etching the semiconductor layer to form the second opening comprises patterning and etching the isolation material.

2. The method of claim 1 , wherein a depth of the first opening is between about 80% and 95% of a thickness of the semiconductor layer.

3. The method of claim 1 , wherein forming the pad structure comprises forming a capping layer prior to forming the metal fill.

4. The method of claim 1 , wherein forming the pad structure comprises forming a liner layer prior to forming the metal fill.

5. The method of claim 1 , wherein at least one deep trench isolation structure of the plurality of deep trench isolation structures is formed between adjacent photo detectors of the plurality of photo detectors.

6. The method of claim 1 , further comprising forming metal grid structures on the isolation material and performing a planarization process on the isolation material prior to forming the metal grid structures.

7. The method of claim 1 , wherein the first opening is formed prior to disposing the interconnect structures.

8. The method of claim 1 , wherein disposing the interconnect structures comprises bonding a carrier wafer to the semiconductor layer.

9. A method of forming a semiconductor image sensor device, the method comprising:

forming a plurality of photo detectors in a semiconductor layer;

etching the semiconductor layer to form a first opening in a surface of the semiconductor layer and adjacent to at least one pixel of the plurality of photo detectors;

forming, in the first opening, a pad structure that comprises a liner layer and a metal fill;

depositing an isolation material on the semiconductor layer to form a plurality of isolation structures in the semiconductor layer;

forming metal grid structures on the plurality of isolation structures; and

etching the semiconductor layer to form a second opening in the semiconductor layer to expose at least a portion of the pad structure, wherein etching the semiconductor layer to form the second opening comprises patterning and etching the isolation material.

10. The method of claim 9 , wherein the semiconductor layer further comprises another surface opposite to the surface, wherein the plurality of photo detectors are configured to detect light that enters into the semiconductor layer through the other surface of the semiconductor layer.

11. The method of claim 9 , wherein forming the plurality of isolation structures comprises

planarizing the isolation material.

12. The method of claim 9 , wherein forming the pad structure further comprises depositing a capping material in the first opening prior to form the metal fill.

13. A method of forming a semiconductor image sensor device, the method comprising:

forming a plurality of photo detectors in a semiconductor layer;

forming a first opening in a first surface of the semiconductor layer;

depositing a liner layer in the first opening;

depositing a capping layer in the first opening and on the liner layer;

depositing a metal fill in the first opening and on the capping layer;

bonding an interconnect structure to the first surface of the semiconductor layer, wherein at least one conductive line of the interconnect structure is in contact with the metal fill; and

forming a second opening in the semiconductor layer through a second surface of the semiconductor layer to expose at least a portion of the capping layer, wherein the second surface is opposite to the first surface.

14. The method of claim 13 , further comprising depositing an isolation material to form a plurality of deep trench isolation structures in the semiconductor layer.

15. The method of claim 13 , further comprising forming at least one deep trench isolation structure between adjacent photo detectors of the plurality of photo detectors.

16. The method of claim 13 , wherein a depth of the first opening is between about 80% and 95% of a thickness of the semiconductor layer.

17. The method of claim 14 , wherein forming the second opening comprises patterning and etching the isolation material.

18. The method of claim 13 , wherein the metal fill is in contact with the liner layer.

19. The method of claim 13 , wherein forming the second opening comprises etching the liner layer.

20. The method of claim 13 , wherein depositing the capping layer comprises depositing aluminum copper alloy.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2018
From: CHENG, YUN-WEI; CHOU, CHUN-HAO; LEE, KUO-CHENG; HUANG, HSUN-YING; HUANG, YIN-CHIEH
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 045480/0879 →
Continuity (2)
Provisional Application 62591507 · Nov 28, 2017
Related Publication 20190165029A1 · May 30, 2019
Cited By (3)
US 12,191,338 US 12,261,188 US 12,666,733