IP Library Granted Patent US 10,539,884
Granted Patent B2
US 10,539,884 · App. 15/902,036 · Granted Jan 21, 2020

Post-lithography defect inspection using an e-beam inspection tool

Inventors: Luciana Meli Thompson (Albany, NY); Ashim Dutta (Menands, NY); Ekmini A. De Silva (Slingerlands, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G03F7/7065C23C16/24C23C16/40C23C16/45525C23C16/45536G03F7/167H01L21/0228H01L21/0273H01L21/02274H01L22/12H01J37/28H01L21/0214H01L21/0217H01L21/02126H01L21/02164H01L21/02167H01L21/02175H01L21/02181H01L21/02183H01L21/02186
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Quick Facts
Patent No.
US 10,539,884
App. No.
15/902,036
Granted
Jan 21, 2020
Kind
B2
Abstract

Methods for post-lithographic inspection using an e-beam inspection tool of organic EUV sensitive photoresists generally includes conformal deposition of a silicon derivative or a metal oxide onto the relief image, wherein the silicon derivative is a material selected to have a dielectric constant that is greater than the dielectric constant of the underlying organic EUV sensitive photoresist. The conformal deposition of the silicon derivative or the metal oxide includes a low temperature vapor deposition process of less than about 100° C. to provide a coating thickness of less than about 5 nanometers.

Claims (30)

1. A method for preparing a semiconductor wafer with organic extreme ultraviolet sensitive (EUV) photoresist relief images thereon for defect inspection, the method comprising:

providing a semiconductor wafer having a relief image of an organic EUV sensitive photoresist thereon;

conformally coating a silicon derivative or a metal oxide onto the relief image using a vapor deposition process at a temperature less than about 100° C. and at a thickness less than about 5 nanometers, wherein a dielectric constant of the silicon derivative is greater than a dielectric constant of the organic EUV photoresist; and

inspecting the wafer using an e-beam inspection tool.

2. The method of claim 1 , wherein the vapor deposition process comprises a thermal atomic layer deposition process.

3. The method of claim 1 , wherein the vapor deposition process comprises a plasma enhanced atomic layer deposition process.

4. The method of claim 1 wherein the silicon derivative has a dielectric constant greater than about 2.5 and the organic EUV photoresist has a dielectric constant less than about 2.5.

5. The method of claim 1 wherein the silicon derivative has a dielectric constant greater than about 2.5 and less than about 7.5.

6. The method of claim 1 wherein the silicon derivative comprises a material selected from the group consisting of silicon dioxide, silicon nitride, silicon oxynitride, silicon carbide and silicon oxycarbide.

7. The method of claim 1 , wherein the metal oxide comprises an oxide of a metal selected from the group consisting of titanium, hafnium, tantalum, cobalt, and tantalum.

8. The method of claim 1 , wherein the vapor deposition process is at temperature ranging from about room temperature to less than about 100° C.

9. The method of claim 1 , wherein the silicon derivative coating is amorphous.

10. A method for examining a semiconductor wafer having an organic EUV photoresist relief image thereon using an e-beam inspection tool, the method comprising:

providing a semiconductor wafer having an organic EUV photoresist relief image thereon;

conformally coating a silicon derivative or a metal oxide onto the photoresist relief image using a vapor deposition process at a temperature less than about 100° C. and at a thickness less than about 5 nanometers, wherein a dielectric constant of the silicon derivative is greater than a dielectric constant of the organic EUV photoresist; and

introducing the wafer into an e-beam inspection tool and scanning the wafer for defect detection.

11. The method of claim 10 , wherein the vapor deposition process comprises a thermal atomic layer deposition process.

12. The method of claim 10 , wherein the vapor deposition process comprises a plasma enhanced atomic layer deposition process.

13. The method of claim 10 , wherein the silicon derivative has a dielectric constant greater than about 2.5 and the organic EUV photoresist has a dielectric constant less than about 2.5.

14. The method of claim 10 , wherein the silicon derivative has a dielectric constant greater than about 2.5 to less than about 7.5.

15. The method of claim 10 , wherein the silicon derivative comprises a material selected from the group consisting of silicon dioxide, silicon nitride, silicon oxynitride, silicon carbide and silicon oxycarbide.

16. The method of claim 10 , wherein the metal oxide comprises an oxide of a metal selected from the group consisting of titanium, hafnium, tantalum, cobalt, and tantalum.

17. The method of claim 10 , wherein the vapor deposition process is at temperature ranging from about room temperature to less than about 100° C.

18. The method of claim 10 , wherein examining the wafer comprises measuring dimensions of patterns in the photoresist relief image and identifying residues, debris, and scum left by photoresist processing.

19. A method for examining a semiconductor wafer having an organic EUV photoresist relief image thereon for defects, the method comprising:

coating an organic EUV photoresist onto a semiconductor wafer at a thickness within a range of about 30 nanometers to about 50 nanometers;

lithographically forming a relief image of the EUV photoresist, wherein the relief image comprises sub-40 nm lines and spaces having a pitch of about 1:1 or less;

conformally coating a silicon derivative or a metal oxide onto the relief image using a vapor deposition at a temperature less than about 100° C. and at a thickness less than about 5 nanometers, wherein a dielectric constant of the silicon derivative is greater than a dielectric constant of the organic EUV photoresist; and

introducing the wafer in an e-beam tool for inspection and inspecting the semiconductor wafer, wherein inspecting the semiconductor wafer comprises taking an image of a location by scanning the semiconductor wafer with a focused electron beam and comparing the image to a reference image from another wafer location with an identical design, or to a preexisting image stored on a computer, so as to flag differences between the image of the location and the reference image or the preexisting image as a defect.

20. The method of claim 19 , wherein the vapor deposition process is a thermal atomic layer deposition process or a plasma enhanced atomic layer deposition process.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2018
From: MELI THOMPSON, LUCIANA; DUTTA, ASHIM; DE SILVA, EKMINI A.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 045001/0448 →
Continuity (1)
Related Publication 20190258171A1 · Aug 22, 2019