IP Library › Granted Patent US 10,540,281
Granted Patent B2
US 10,540,281 · App. 15/407,681 · Granted Jan 21, 2020

Cache allocation based on quality-of-service monitoring

Inventors: Paul Stanley Hughes (Whittlesford, GB); Michael Andrew Campbell (Waterbeach, GB)
Assignee: Arm Limited
G06F12/0804G06F12/0888G06F12/121G06F12/122G06F12/123G06F12/127G06F2212/1016
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Quick Facts
Patent No.
US 10,540,281
App. No.
15/407,681
Granted
Jan 21, 2020
Kind
B2
Abstract

A cache to provide data caching in response to data access requests from at least one system device, and a method operating such a cache, are provided. Allocation control circuitry of the cache is responsive to a cache miss to allocate an entry of the multiple entries in the data caching storage circuitry in dependence on a cache allocation policy. Quality-of-service monitoring circuitry is responsive to a quality-of-service indication to modify the cache allocation policy with respect to allocation of the entry for the requested data item. The behaviour of the cache, in particular regarding allocation and eviction, can therefore be modified in order to seek to maintain a desired quality-of-service for the system in which the cache is found.

Claims (30)

1. A cache to provide data caching in response to data access requests from at least one system device comprising:

data caching storage circuitry having multiple entries to cache data items returned from memory in response to the data access requests;

allocation control circuitry responsive to absence of a requested data item in the data caching storage circuitry to allocate an entry of the multiple entries in the data caching storage circuitry in dependence on a cache allocation policy;

quality-of-service monitoring circuitry responsive to a quality-of-service indication to modify the cache allocation policy with respect to allocation of the entry for the requested data item; and

transaction queue circuitry to hold at least one data transaction pending transmittal to memory in a shared memory transaction queue for multiple system devices,

where the quality-of-service indication is a status indication received from the transaction queue circuitry,

the status indication signifying that allocating an entry of the multiple entries in the data caching storage circuitry for caching the requested data item according to the cache allocation policy, and evicting a data item stored in the cache into the shared memory transaction queue, would cause a number of entries in the shared memory transaction queue to be available to a given system device to fall below a threshold minimum.

2. The cache as claimed in claim 1 , wherein the quality-of-service monitoring circuitry is responsive to the quality-of-service indication to prevent allocation for the requested data item in a dirty entry of the multiple entries, wherein the dirty entry holds at least one data item marked as locally modified.

3. The cache as claimed in claim 2 , wherein the quality-of-service monitoring circuitry is responsive to the quality-of-service indication to cause allocation for the requested data item in a clean entry of the multiple entries, wherein the clean entry holds no data items marked as locally modified.

4. The cache as claimed in claim 3 , wherein the quality-of-service monitoring circuitry is responsive to presence of multiple clean entries holding data items marked as locally unmodified in the data caching storage circuitry to select one of the multiple clean entries for allocation for the requested data item on a randomized basis.

5. The cache as claimed in claim 3 , wherein the quality-of-service monitoring circuitry is responsive to presence of multiple clean entries holding data items marked as locally unmodified in the data caching storage circuitry to select one of the multiple clean entries for allocation for the requested data item on a least-recently-used basis.

6. The cache as claimed in claim 2 , wherein the quality-of-service monitoring circuitry is responsive to the quality-of-service indication to prevent allocation for the requested data item in any entry of the data caching storage circuitry.

7. The cache as claimed in claim 1 , wherein the transaction queue circuitry comprises eviction queue circuitry to hold at least one modified data item which has been evicted from the data caching storage circuitry pending a write-back of the at least one modified data item to memory, and wherein the quality-of-service indication is a status indication received from the eviction queue circuitry.

8. The cache as claimed in claim 7 , wherein the status indication indicates that at least a threshold number of modified data items are currently held in the eviction queue circuitry pending write-back to memory.

9. The cache as claimed in claim 1 , comprising system performance monitoring circuitry to maintain a performance metric value for the at least one system device, wherein the quality-of-service monitoring circuitry responsive to an outcome of a comparison of the performance metric value with respect to a performance threshold value to modify the cache allocation policy with respect to the allocation of the entry for the requested data item.

10. The cache as claimed in claim 9 , wherein the system performance monitoring circuitry comprises bandwidth monitoring circuitry that is responsive to elapse of a predetermined time period to decrease the bandwidth performance value and is responsive to issuance of an access to memory for the at least one system device to increase the bandwidth performance value.

11. The cache as claimed in claim 9 , wherein the system performance monitoring circuitry comprises bandwidth monitoring circuitry to maintain a bandwidth performance value for the at least one system device, wherein the quality-of-service monitoring circuitry responsive to an outcome of a comparison of the bandwidth performance value with respect to a bandwidth performance threshold value to modify the cache allocation policy with respect to the allocation of the entry for the requested data item.

12. The cache as claimed in claim 1 , wherein the cache is a system cache to provide data caching in response to data access requests from multiple system devices.

13. A method of operating a cache to provide data caching in response to data access requests from at least one system device comprising:

caching data items returned from memory in response to the data access requests in data caching storage having multiple entries;

in response to absence of a requested data item in the data caching storage, allocating an entry of the multiple entries in the data caching storage in dependence on a cache allocation policy;

modifying the cache allocation policy with respect to allocation of the entry for the requested data item in response to a quality-of-service indication; and

holding at least one data transaction pending transmittal in a shared memory transaction queue to that holds pending memory transactions for multiple system devices, where the quality-of-service indication is a status indication that signifies allocating an entry of the multiple entries in the data caching storage circuitry for caching the requested data item according to the cache allocation policy, and evicting a data item from the cache into the shared memory transaction queue, would cause a number of entries in the shared memory transaction queue for to be available to a given system device to fall below a threshold minimum.

14. A cache to provide data caching in response to data access requests from at least one system device comprising:

means for caching data items returned from memory in response to the data access requests in data caching storage having multiple entries;

means for allocating an entry of the multiple entries in the data caching storage in dependence on a cache allocation policy in response to absence of the requested data item in the data caching storage;

means for modifying the cache allocation policy with respect to allocation of the entry for the requested data item in response to a quality-of-service indication; and

means to hold at least one data transaction pending transmittal to memory in a shared memory transaction queue for multiple system devices,

where the quality-of-service indication is a status indication received from the transaction queue circuitry,

the status indication signifying that allocating an entry of the multiple entries in the data caching storage circuitry for caching the requested data item according to the cache allocation policy, and evicting a data item stored in the cache into the shared memory transaction queue, would cause a number of entries in the shared memory transaction queue to be available to a given system device to fall below a threshold minimum.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2017
From: HUGHES, PAUL STANLEY; CAMPBELL, MICHAEL ANDREW
To: ARM LTD
Reel/Frame 041380/0267 →
Continuity (1)
Related Publication 20180203798A1 · Jul 19, 2018