IP Library › Granted Patent US 10,546,374
Granted Patent B2
US 10,546,374 · App. 15/912,611 · Granted Jan 28, 2020

SEM inspection apparatus and pattern matching method

Inventors: Atsushi Onishi (Nagoya, JP); Kazuhiro Nojima (Yokkaichi, JP)
Assignee: Toshiba Memory Corporation
G06T7/001G06T2207/10061G06T2207/30148H01J37/29H01J2237/2817
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,546,374
App. No.
15/912,611
Granted
Jan 28, 2020
Kind
B2
Abstract

According to one embodiment, an SEM inspection apparatus includes an arithmetic processor. The arithmetic processor acquires design data corresponding to an inspection region. The arithmetic processor obtains a resistance component between each of wiring lines included in the inspection region and a portion on a substrate connected thereto, on a basis of the design data. The arithmetic processor obtains a capacitance component between each of the wiring lines included in the inspection region and the portion on the substrate connected thereto, on a basis of the design data. The arithmetic processor color-codes the wiring lines included in the inspection region of the design data, on a basis of a combination of the resistance component and the capacitance component. The arithmetic processor corrects a coordinate deviation between an SEM image and the color-coded design data by performing pattern matching between the color-coded design data and the SEM image.

Claims (28)

1. An SEM inspection apparatus comprising an arithmetic processor, wherein the arithmetic processor operates

to acquire an SEM image of an inspection region containing a defect of an inspection object including a plurality of wiring lines above a substrate,

to acquire design data corresponding to the inspection region of the inspection object,

to obtain a resistance component between each of the wiring lines included in the inspection region and a portion on the substrate connected thereto, on a basis of the design data,

to obtain a capacitance component between each of the wiring lines included in the inspection region and the portion on the substrate connected thereto, on a basis of the design data,

to color-code the wiring lines included in the inspection region of the design data, on a basis of combination of the resistance component and the capacitance component, and

to correct a coordinate deviation between the SEM image and the color-coded design data by performing pattern matching between the color-coded design data and the SEM image.

2. The SEM inspection apparatus according to claim 1 , wherein the arithmetic processor operates to classify resistance components on a basis of connection destinations on the substrate connected from the wiring lines to obtain the resistance component.

3. The SEM inspection apparatus according to claim 2 , wherein each of the connection destinations is any one of a P+-diffusion layer arranged in a P-well, an N+-diffusion layer arranged in an N-well, a P+-diffusion layer arranged in an N-well, an N+-diffusion layer arranged in a P-well, and a gate electrode.

4. The SEM inspection apparatus according to claim 3 , wherein the arithmetic processor operates to classify capacitance components, on a basis of junction areas of diffusion layers on the substrate, to which the wiring lines are connected to obtain the capacitance component.

5. The SEM inspection apparatus according to claim 4 , wherein the arithmetic processor operates to color-code the wiring lines in the design data, in accordance with color classification information that defines colors to be applied to the wiring lines in the design data on a basis of combinations of the resistance components and the capacitance components.

6. The SEM inspection apparatus according to claim 5 , wherein the color classification information has been prepared by acquiring a relation between the capacitance components and corresponding brightness in the SEM image, for each of the resistance components.

7. The SEM inspection apparatus according to claim 1 , further comprising an inspection image pick-up part that picks up the SEM image of the inspection object.

8. The SEM inspection apparatus according to claim 1 , wherein the SEM image is a secondary electron image.

9. A pattern matching method comprising:

acquiring an SEM image of an inspection region containing a defect of an inspection object including a plurality of wiring lines above a substrate,

acquiring design data corresponding to the inspection region of the inspection object,

obtaining a resistance component between each of the wiring lines included in the inspection region and a portion on the substrate connected thereto, on a basis of the design data,

obtaining a capacitance component between each of the wiring lines included in the inspection region and the portion on the substrate connected thereto, on a basis of the design data,

color coding the wiring lines included in the inspection region of the design data, on a basis of a combination of the resistance component and the capacitance component, and

correcting a coordinate deviation between the SEM image and the color-coded design data by performing pattern matching between the color-coded design data and the SEM image.

10. The pattern matching method according to claim 9 , wherein, in the obtaining of the resistance component, resistance components are classified, on a basis of connection destinations on the substrate connected from the wiring lines.

11. The pattern matching method according to claim 10 , wherein each of the connection destinations is any one of a P+-diffusion layer arranged in a P-well, an N+-diffusion layer arranged in an N-well, a P+-diffusion layer arranged in an N-well, an N+-diffusion layer arranged in a P-well, and a gate electrode.

12. The pattern matching method according to claim 11 , wherein, in the obtaining of the capacitance component, capacitance components are classified, on a basis of junction areas of diffusion layers on the substrate, to which the wiring lines are connected.

13. The pattern matching method according to claim 12 , wherein, in the color-coding, the wiring lines in the design data are color-coded, in accordance with color classification information that defines colors to be applied to the wiring lines in the design data on a basis of combinations of the resistance components and the capacitance components.

14. The pattern matching method according to claim 13 , wherein the color classification information has been prepared by acquiring a relation between the capacitance components and corresponding brightness in the SEM image, for each of the resistance components.

15. The pattern matching method according to claim 9 , further comprising picking up the SEM image of the inspection object.

16. The pattern matching method according to claim 9 , wherein the SEM image is a secondary electron image.

Assignments (4)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2018
From: ONISHI, ATSUSHI; NOJIMA, KAZUHIRO
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 045891/0855 →
Priority Claims (1)
JP 2017-174378 · Sep 11, 2017 · national
Continuity (1)
Related Publication 20190080445A1 · Mar 14, 2019
Cited By (2)
US 12,229,944 US 12,307,651