Semiconductor device with voltage resistant structure
A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion.
1. A semiconductor device comprising:
a cell region in which a circuit element is formed;
a gate trench formed in the cell region;
a source region formed around the gate trench;
a first conductivity type outer peripheral portion formed on a periphery of the cell region;
a concave portion formed on a surface of the outer peripheral portion;
a second conductivity type surface doping region formed on a periphery of the concave portion; and
a surface insulating film disposed in a manner extending across the cell region and the outer peripheral portion, and having a first thickness in the cell region thinner than a second thickness in the outer peripheral portion.
2. The semiconductor device according to claim 1 , wherein
the gate trench is formed in a lattice pattern such that the gate trench defines the source region in each area surrounded by the lattice pattern,
the semiconductor device includes a source electrode connecting between a plurality of the source regions.
3. The semiconductor device according to claim 1 , wherein
a plurality of the concave portions and the surface doping regions are formed in a direction toward a periphery of the semiconductor device.
4. The semiconductor device according to claim 1 , wherein a plurality of the concave portions are arranged at regular intervals.
5. The semiconductor device according to claim 3 , wherein
the plurality of concave portions include a first shape having a first width and a second shape having a second width.
6. The semiconductor device according to claim 1 , further comprising a conductive member embedded in the concave portion.
7. The semiconductor device according to claim 2 , wherein
a plurality of the concave portions and the surface doping regions are formed in a direction toward a periphery of the semiconductor device.
8. The semiconductor device according to claim 3 , wherein the plurality of concave portions are arranged at regular intervals.
9. The semiconductor device according to claim 4 , wherein
the plurality of concave portions include a first shape having a first width and a second shape having a second width.
10. The semiconductor device according to claim 1 , further comprising a conductive member embedded in the concave portion through an insulating film.
11. The semiconductor device according to claim 1 , wherein the semiconductor device includes a semiconductor layer made of SiC, GaN, or diamond.