Dielectric isolated fin with improved fin profile
A method of forming a fin structure that includes forming a plurality of fin structures from a bulk semiconductor substrate and forming a dielectric spacer on a sidewall of each fin structure in the plurality of fin structure. A semiconductor spacer is formed on a sidewall of the dielectric spacer. A dielectric fill is formed in the space between the adjacent fin structures. The semiconductor spacer and a portion of the fin structures that is present below a lower surface of the dielectric spacer are oxidized. Oxidizing a base portion of the fin structures produces a first strain and oxidizing the semiconductor spacer produces a second strain that is opposite the first strain.
1. A fin field effect transistor (finFET) comprising:
a fin structure that is present on a dielectric surface, wherein a uniform tail region is present at an interface of the fin structure and the dielectric surface;
a gate structure present on a portion of the fin structure including a gate dielectric in contact with a channel portion of the fin structure; and
a gate sidewall spacer that has a compensatory strain that neutralizes strain in the underlying dielectric surface.
2. The finFET of claim 1 , wherein the uniform tail region is composed of silicon oxide and has a triangular cross section.
3. The finFET of claim 1 , wherein the fin structure comprises a semiconductor material selected from a group consisting of silicon, a silicon carbon alloy, silicon germanium, a silicon germanium with carbon alloy, germanium, gallium arsenic, indium arsenic, indium phosphide and combinations thereof.
4. The FinFET of claim 1 , wherein a dielectric cap is present atop the fin structure.
5. The FinFET of claim 1 , wherein the fin structure have a height ranging from 5 nm to 200 nm.
6. The FinFET of claim 1 , wherein the gate sidewall spacer are comprised of a semiconductor material selected from a group consisting of Si, SiGe, SiGeC, SiC, polysilicon and combinations thereof.
7. The FinFET of claim 6 , wherein the semiconductor material is oxidized.
8. The finFET of claim 1 , wherein the fin structure is substantially relaxed having a strain no greater than about +/−0.1 Gpa.
9. A fin field effect transistor (finFET) comprising:
a fin structure that is present on a dielectric surface, wherein a uniform tail region is present at an interface of the fin structure and the dielectric surface;
a gate structure present on a portion of the fin structure including a gate dielectric in contact with a channel portion of the fin structure;
a gate sidewall spacer that has a compensatory strain that neutralizes strain in the underlying dielectric surface from impacting said fin structure; and
a source region and a drain region on opposing sides of the channel portion of the fin structure.
10. The finFET of claim 9 , wherein the uniform tail region is composed of silicon oxide and has a triangular cross section.
11. The FinFET of claim 9 , wherein the gate sidewall spacer are comprised of a semiconductor material selected from the group consisting of Si, SiGe, SiGeC, SiC, polysilicon and combinations thereof.
12. The FinFET of claim 11 , wherein the semiconductor material is oxidized.
13. The finFET of claim 9 , wherein the fin structure is substantially relaxed having a strain no greater than about +/−0.1 Gpa.