IP Library › Granted Patent US 10,553,258
Granted Patent B2
US 10,553,258 · App. 16/229,406 · Granted Feb 4, 2020

Integrated thermoelectric cooler for three-dimensional stacked Dram and temperature-inverted cores

Inventor: Wei Huang (Austin, TX)
Assignee: Advanced Micro Devices, Inc.
G11C7/04H01L23/38H01L27/16H01L35/32H01L27/10897
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Quick Facts
Patent No.
US 10,553,258
App. No.
16/229,406
Granted
Feb 4, 2020
Kind
B2
Abstract

Managing temperature of a semiconductor device having a temperature inverted processor core and stacked memory by operation of an integrated thermoelectric cooler. The thermoelectric cooler is operated to pump heat from a stacked memory device that requires a cool operating temperature to a temperature inverted processor core that maintains a higher operating temperature until threshold operating temperatures are achieved.

Claims (34)

1. A method of thermal management, comprising:

determining a first operating temperature threshold for a first circuit and a second operating temperature threshold for a second circuit, the second circuit being a temperature inverted circuit coupled to the first circuit; and

responsive to a temperature of the second circuit being less than the second operating temperature threshold, transferring heat from the first circuit to the second circuit by operating a thermoelectric cooler, wherein the first operating temperature threshold is lower than the second operating temperature threshold.

2. The method of claim 1 , wherein operating the thermoelectric cooler comprises monitoring a temperature of the first circuit by one or more sensors associated with the first circuit and monitoring the temperature of the second circuit by one or more sensors associated with the second circuit.

3. The method of claim 1 , wherein transferring heat is based on a temperature inversion that causes the second circuit to increase speed and frequency as temperature increases.

4. The method of claim 2 , wherein the first circuit comprises a three-dimensional stacked memory circuit.

5. The method of claim 4 , wherein the second circuit comprises logic layers of a processor.

6. The method of claim 5 , wherein monitoring the temperature of the second circuit comprises: in response to detecting that the logic layers are overheating, reducing a number of operating thermoelectric coolers.

7. The method of claim 5 , wherein monitoring the temperature of the second circuit comprises: in response to detecting that the logic layers are overheating, reducing an operating voltage and frequency of the logic layers.

8. A method, comprising:

monitoring, at one or more thermal sensors associated with a first circuit, an operating temperature of the first circuit;

monitoring, at one or more thermal sensors associated with a second circuit comprising a temperature inverted circuit coupled to the first circuit, an operating temperature of the second circuit;

transferring, in response to the operating temperature of the first circuit exceeding a first operating temperature threshold, heat from the first circuit to the second circuit by operating a first thermoelectric cooler of a plurality of thermoelectric coolers coupled between the first circuit and the second circuit.

9. The method of claim 8 , further comprising:

transferring, in response to the operating temperature of the first circuit exceeding a second operating temperature threshold greater than the first operating temperature threshold, heat from the first circuit to the second circuit by additionally operating a second thermoelectric cooler of the plurality of thermoelectric coolers.

10. The method of claim 9 , further comprising:

deactivating, in response to the operating temperature of the first circuit falling below the second operating temperature threshold, the second thermoelectric cooler while maintaining operation of the first thermoelectric cooler.

11. The method of claim 8 , wherein transferring heat is based on a temperature inversion that causes the second circuit to increase speed and frequency as temperature increases.

12. The method of claim 8 , wherein the first circuit comprises a three-dimensional stacked memory circuit, and further wherein the second circuit comprises logic layers of a processor.

13. The method of claim 12 , wherein monitoring the operating temperature of the second circuit further comprises: in response to detecting that the logic layers are overheating, reducing a number of operating thermoelectric coolers of the plurality of thermoelectric coolers.

14. The method of claim 12 , wherein monitoring the operating temperature of the second circuit comprises: in response to detecting that the logic layers are overheating, reducing an operating voltage and frequency of the logic layers.

15. A non-transitory computer readable medium embodying a set of executable instructions, the set of executable instructions to configure a control module to:

determine, at a temperature aware controller, that an operating temperature of a first circuit exceeds a first operating temperature threshold; and

instruct, in response to determining the operating temperature of the first circuit exceeds the first operating temperature threshold, the temperature aware controller to operate a first thermoelectric cooler of a plurality of thermoelectric coolers coupled between the first circuit and a second circuit comprising a temperature inverted circuit.

16. The non-transitory computer readable medium of claim 15 , wherein the set of executable instructions are further to configure the control module to:

transfer, in response to the operating temperature of the first circuit exceeding a second operating temperature threshold greater than the first operating temperature threshold, heat from the first circuit to the second circuit by additionally operating a second thermoelectric cooler of the plurality of thermoelectric coolers.

17. The non-transitory computer readable medium of claim 16 , wherein the set of executable instructions are further to configure the control module to:

deactivate, in response to the operating temperature of the first circuit falling below the second operating temperature threshold, the second thermoelectric cooler while maintaining operation of the first thermoelectric cooler.

18. The non-transitory computer readable medium of claim 15 , wherein the set of executable instructions are further to configure the control module to:

instruct, in response to an operating temperature of the second circuit exceeding a predefined threshold, the temperature aware controller to reduce a number of operating thermoelectric coolers of the plurality of thermoelectric coolers.

19. The non-transitory computer readable medium of claim 15 , wherein the set of executable instructions are further to configure the control module to:

instruct, in response to an operating temperature of the second circuit exceeding a predefined threshold, the temperature aware controller to reduce an operating voltage and frequency of the second circuit.

20. The non-transitory computer readable medium of claim 15 , wherein the set of executable instructions are further to configure the control module to:

transfer heat from the first circuit to the second circuit based on a temperature inversion that causes the second circuit to increase speed and frequency as temperature increases.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2019
From: HUANG, WEI
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 047919/0824 →
Continuity (2)
Division 15618349 · Jun 9, 2017
Related Publication 20190122704A1 · Apr 25, 2019