IP Library Granted Patent US 10,553,633
Granted Patent B2
US 10,553,633 · App. 14/291,009 · Granted Feb 4, 2020

Phototransistor with body-strapped base

Inventors: Klaus Y. J. Hsu (New Taipei, TW); Brett W. C. Liao (New Taipei, TW)
Assignees: Klaus Y.J. Hsu; Wispro Technology Cosulting Corporation Limited
H01L27/1463H01L27/14681H01L27/14683H01L31/10H01L31/11H01L31/1105
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Quick Facts
Patent No.
US 10,553,633
App. No.
14/291,009
Granted
Feb 4, 2020
Kind
B2
Abstract

A photodetector includes a two-terminal bipolar phototransistor arranged on a substrate. The phototransistor includes a base, a collector, and an emitter. An electrical connection is made between the base and the local substrate near a region of the phototransistor. The electrical connection can be by way of metal interconnects.

Claims (29)

1. A photodetector structure, comprising:

a substrate;

at least one phototransistor, the at least one phototransistor having a base, the base is directly connected to a metal interconnect through which the base is electrically connected to the substrate, but physically separated from the substrate; and

an n-type conductivity region adjacent to the substrate,

wherein the substrate is of p-type conductivity, the at least one phototransistor is formed on the n-type conductivity region, and the metal interconnect is physically separated from the n-type conductivity region.

2. The photodetector structure according to claim 1 , wherein a collector region and an emitter region are formed in the p-type conductivity region and separated by an n-channel metal oxide field effect transistor (nMOS FET).

3. The photodetector structure according to claim 1 , wherein the at least one phototransistor is a plurality of phototransistors arranged in a one dimensional array.

4. The photodetector structure according to claim 1 , wherein the at least one phototransistor is a plurality of phototransistors arranged in a two dimensional array.

5. The photodetector structure according to claim 1 , wherein the photodetector structure is an electronic module, the at least one phototransistor is a plurality of phototransistors arranged in a matrix, and the at least one, phototransistor is connected to a multiplexer and a row and column decoder.

6. A method for fabricating a photodetector structure, comprising:

forming an n-type buried layer on a p-type substrate;

forming an n-type epitaxial layer of the buried layer;

forming a p-type base layer on the epitaxial layer;

forming an n-type emitter layer on a portion of the base layer; and

forming a metal interconnect directly in contact with the base layer through which the base is electrically connected to the substrate,

wherein the metal interconnect is physically separated from the buried layer and the epitaxial layer.

7. A photosensitive device, comprising:

a substrate of a first conductivity type;

a buried layer of a second conductivity type adjacent to the substrate; and

at least one phototransistor, comprising a base of the first conductivity type,

wherein the base layer is directly connected to a metal interconnect through which the base is electrically connected to the substrate, but physically separated from the substrate, and the metal interconnect is physically separated from the buried layer of the second conductivity type.

8. The photosensitive device according to claim 7 , wherein the at least one phototransistor is a plurality of phototransistors arranged in a one dimensional array.

9. The photosensitive device according to claim 7 , wherein the at least one phototransistor is a plurality of phototransistors arranged in a two dimensional array.

10. A semiconducting device, comprising:

a substrate; and

a two terminal light sensitive transistor comprising a base and a buried layer of n-type conductivity;

wherein the base is directly connected to a metal interconnect through which the base is electrically connected to the substrate, but physically separated from the substrate, the substrate is of p-type conductivity, the base is of p-type conductivity, and the metal interconnect is physically separated from the buried layer of n-type conductivity.

11. The semiconducting device according to claim 10 , wherein the base and the substrate are floating.

12. The semiconducting device of claim 10 , wherein the base is separated from the substrate by the buried layer and an n-type conductivity epitaxial region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2014
From: HSU, KLAUS Y. J.; LIAO, BRETT W. C.
To: KLAUS Y.J. HSU; WISPRO TECHNOLOGY CONSULTING CORPORATION
Reel/Frame 032992/0581 →
Continuity (1)
Related Publication 20150349186A1 · Dec 3, 2015