IP Library › Granted Patent US 10,559,565
Granted Patent B2
US 10,559,565 · App. 16/288,727 · Granted Feb 11, 2020

Integrated circuit device and method of manufacturing the same

Inventors: Jung-han Lee (Anyang-si, KR); Sun-ghil Lee (Hwaseong-si, KR); Myung-il Kang (Yongin-si, KR); Jeong-yun Lee (Yongin-si, KR); Seung-hun Lee (Hwaseong-si, KR); Hyun-jung Lee (Suwon-si, KR); Sun-wook Kim (Seongnam-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L27/0886H01L21/823418H01L27/0207H01L27/1104H01L27/1116H01L29/0649
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Quick Facts
Patent No.
US 10,559,565
App. No.
16/288,727
Granted
Feb 11, 2020
Kind
B2
Abstract

An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.

Claims (55)

1. A method of manufacturing an integrated circuit device, the method comprising:

forming a first fin-type active region and a first device isolation film covering both lower sidewalls of the first fin-type active region in a first region of a substrate;

forming a second fin-type active region and a second device isolation film covering both lower sidewalls of the second fin-type active region in a second region of the substrate;

forming a spacer layer covering the first fin-type active region, the first device isolation film, the second fin-type active region, and the second device isolation film;

forming a first recess in the first fin-type active region, the first recess having a first depth;

forming first fin insulating spacers covering both upper sidewalls of the first fin-type active region over the first device isolation film by etching the spacer layer in the first region, a top portion of each of the first fin insulating spacers being at a level not higher than a level of a bottom surface of the first recess;

forming a first source/drain region to fill the first recess;

etching the spacer layer in the second region to expose the second device isolation film;

forming a second recess in the second fin-type active region, the second recess having a second depth that is greater than the first depth;

forming a second source/drain region to fill the second recess;

forming a first gate line to cover the first fin-type active region in the first region, the first gate line having a third width;

forming a second gate line to cover the second fin-type active region in the second region, the second gate line having a fourth width that is less than the third width; and

forming gate insulating spacers on both sides of the second gate line, the gate insulating spacers being derived from the spacer layer,

the forming the gate insulating spacers and the forming the first fin insulating spacers being formed simultaneously.

2. The method of claim 1 , wherein the first source/drain region has a first width, and the second source/drain region has a second width that is greater than the first width.

3. The method of claim 1 , wherein the etching the spacer layer in the second region comprises removing the spacer layer in the second region so that the spacer layer does not remain on both sidewalls of the second fin-type active region.

4. The method of claim 1 , wherein after the forming the second recess, the second device isolation film protrudes from the substrate on both sides of the second recess further than a bottom surface of the second recess.

5. The method of claim 1 , wherein the etching the spacer layer in the second region comprises forming second fin insulating spacers covering both upper sidewalls of the second fin-type active region over the second device isolation film, and forming a preliminary recess in the second fin-type active region, and

wherein the forming the second recess comprises selectively removing a portion of the second fin-type active region exposed by the preliminary recess, a bottom surface of the second recess being at a lower level than a top potion of the second fin insulating spacer.

6. The method of claim 5 , wherein, after the forming the second recess, the second fin insulating spacers protrudes to a higher level than a level of a bottom surface of the second recess.

7. The method of claim 1 , wherein the forming the second recess includes forming the second recess to have a bottom surface at a lower level than a top surface of the second device isolation film.

8. The method of claim 1 , wherein the forming the first source/drain region is performed before the forming the second recess.

9. The method of claim 1 , wherein the forming the first source/drain region is performed after the forming the first recess and the forming the second recess.

10. The method of claim 1 , further comprising:

lowering a level of a top surface of a portion of the first device isolation film while forming the first fin insulating spacers so that a top surface of the first device isolation film is at a lower level than a top surface of the second device isolation film.

11. A method of manufacturing an integrated circuit device, the method comprising;

forming a first fin-type active region and a first device isolation film covering both lower sidewalls of the first fin type active region in a first region of a substrate;

forming a second fin-type active region and a second device isolation film covering both lower sidewalls of the second fin-type active region in a second region of the substrate;

forming a spacer layer covering the first fin-type active region, the first device isolation film, the second fin type active region, and the second device isolation film;

forming a first recess in the first fin-type active region;

forming first fin insulating spacers covering both upper sidewalls of the first fin-type active region over the first device isolation film by etching the spacer layer in the first region;

forming a first source/drain region to fill the first recess;

forming a preliminary recess in the second fin-type active region,

forming second fin insulating spacers covering both upper sidewalls of the second fin-type active region over the second device isolation film by etching the spacer layer in the second region,

forming a second recess by selectively removing a portion of the second fin-type active region exposed by the preliminary recess so that the second fin insulating spacers are spaced apart from the second fin-type active region; and

forming a second source/drain region to fill the second recess.

12. The method of claim 11 , wherein the forming the first fin-type active region comprises forming the first fin-type active region to include a first channel region having a first height, and

wherein the forming the second fin-type active region comprises forming the second fin-type active region to include a second channel region having a second height that is greater than the first height.

13. The method of claim 11 , wherein the forming the second fin insulating spacers comprises forming the second fin insulating spacers to have a smaller height than the first fin insulating spacers.

14. The method of claim 11 , wherein the forming the second source/drain region comprises forming the second source/drain region having a size greater than a size of the first source/drain region.

15. A method of manufacturing an integrated circuit device, the method comprising:

forming a first fin-type active region in a first region of a substrate;

forming a second fin-type active region in a second region of the substrate;

forming a first recess in the first fin-type active region;

forming first fin insulating spacers covering both upper sidewalls of the first tin-type active region;

forming a first source/drain region to fill the first recess;

forming a preliminary recess in the second fin-type active region;

forming second fin insulating spacers covering both upper sidewalls of the second fin-type active region;

forming a second recess by selectively removing a portion of the second fin-type active region exposed by the preliminary recess so that the second fin insulating spacers are spaced apart from the second fin-type active region; and

forming a second source/drain region to fill the second recess.

16. The method of claim 15 , wherein a top portion of each of the first fin insulating spacers is at a level not higher than a level of a bottom surface of the first recess.

17. The method of claim 15 , wherein the forming the first fin-type active region comprises forming the first fin-type active region to include a first channel region having a first height, and

wherein the forming the second fin type active region comprises forming the second fin-type active region to include a second channel region having a second height that is greater than the first height.

18. The method of claim 15 , wherein the forming the first fin-type active region comprises forming the first fin-type active region to include a first channel region having a first width, and

wherein the forming the second fin-type active region comprises forming the second fin-type active region to include a second channel region having a second width that is less than the first width.

Priority Claims (1)
KR 10-2016-0180140 · Dec 27, 2016 · national
Continuity (2)
Division 15656377 · Jul 21, 2017
Related Publication 20190198497A1 · Jun 27, 2019