IP Library › Granted Patent US 10,566,313
Granted Patent B1
US 10,566,313 · App. 16/106,577 · Granted Feb 18, 2020

Integrated circuit chip carrier with in-plane thermal conductance layer

Inventors: Shidong Li (Poughkeepsie, NY); Kamal K. Sikka (Poughkeepsie, NY)
Assignee: International Business Machines Corporation
H01L25/0657H01L21/563H01L23/3677H01L23/3735H01L24/48H01L23/34H01L23/36H01L23/42H01L23/552H01L2225/06589
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,566,313
App. No.
16/106,577
Granted
Feb 18, 2020
Kind
B1
Abstract

An integrated circuit (IC) chip carrier includes an IC chip electrically connected to an IC chip carrier by a plurality of chip-carrier contacts, a cover thermally connected the IC chip upper surface, and an in-plane thermal conductance (ITC) layer upon the IC chip carrier between the IC chip carrier and the IC chip. The ITC layer includes an extension tab connected to a vertical side surface of the cover. Heat is transferred vertically from the IC chip to the cover. Heat is also transferred vertically from the IC chip to the ITC layer. Heat is also transferred within the ITC layer through the ITC layer basal plane(s). The ITC layer basal plane(s) are positioned horizontally where the ITC layer is between the IC chip and the IC chip carrier. The ITC layer basal planes are positioned vertically where the extension tab contacts the vertical side surface of the cover.

Claims (30)

1. An integrated circuit (IC) chip carrier comprising:

an IC chip electrically connected to an IC chip carrier by a plurality of chip-carrier contacts;

a cover thermally connected the IC chip upper surface; and

an in-plane thermal conductance (ITC) layer upon the IC chip carrier between the IC chip carrier and the IC chip, the ITC layer comprising an extension tab connected to a vertical side surface of the cover.

2. The carrier of claim 1 , wherein the ITC layer comprises a plurality of openings therethrough, each of the plurality of openings aligned with one of the plurality of chip-carrier contacts.

3. The carrier of claim 1 , wherein the ITC layer comprises an opening therethrough, the opening aligned around the circumference of the plurality of chip-carrier contacts.

4. The carrier of claim 1 , wherein the ITC layer is an anisotropic material that has first thermal conductivity through its basal plane and a second thermal conductivity through its plane orthogonal to the basal plane, wherein the second thermal conductivity is lower than the first thermal conductivity.

5. The carrier of claim 1 , wherein the ITC layer is a Graphite ITC layer.

6. The carrier of claim 1 , wherein the extension tab is further connected to the cover upper surface.

7. The carrier of claim 1 , wherein ITC layer transfers heat from the IC chip horizontally between the IC chip and the carrier.

8. An electronic device comprising:

an IC chip electrically connected to an IC chip carrier by a plurality of chip-carrier contacts;

a cover thermally connected the IC chip upper surface;

a heatsink thermally connected to the cover upper surface; and

an in-plane thermal conductance (ITC) layer upon the IC chip carrier between the IC chip carrier and the IC chip, the ITC layer comprising an extension tab connected to a vertical side surface of the cover.

9. The electronic device of claim 8 , wherein the ITC layer comprises a plurality of openings therethrough, each of the plurality of openings aligned with one of the plurality of chip-carrier contacts.

10. The electronic device of claim 8 , wherein the ITC layer comprises an opening therethrough, the opening aligned around the circumference of the plurality of chip-carrier contacts.

11. The electronic device of claim 8 , wherein the ITC layer is an anisotropic material that has first thermal conductivity through its basal plane and a second thermal conductivity through its plane orthogonal to the basal plane, wherein the second thermal conductivity is lower than the first thermal conductivity.

12. The electronic device of claim 8 , wherein the ITC layer is a Graphite ITC layer.

13. The electronic device of claim 8 , wherein the extension tab is further connected to the heatsink.

14. The electronic device of claim 8 , wherein ITC layer transfers heat from the IC chip horizontally between the IC chip and the carrier.

15. A heat removal method comprising:

transferring heat vertically from an IC chip to an IC chip cover above the IC chip;

transferring heat vertically from the IC chip to an in-plane thermal conductance (ITC) layer of an IC chip carrier below the IC chip; and

transferring heat within the ITC layer through the ITC layer basal plane(s), wherein the ITC layer basal plane(s) are positioned horizontally where the ITC layer is between the IC chip and the IC chip carrier and wherein the ITC layer basal planes are positioned vertically where the ITC layer contacts a side surface of the IC chip cover.

16. The method of claim 15 , wherein the ITC layer comprises a plurality of openings therethrough, each of the plurality of openings aligned with one of a plurality of chip-carrier contacts that electrically connect the IC chip to the IC chip carrier.

17. The method of claim 15 , wherein the ITC layer comprises an opening therethrough, the opening aligned around a circumference of a plurality of chip-carrier contacts that electrically connect the IC chip to the IC chip carrier.

18. The method of claim 15 , wherein the ITC layer is an anisotropic material that has first thermal conductivity through its basal plane and a second thermal conductivity through its plane orthogonal to the basal plane, wherein the second thermal conductivity is lower than the first thermal conductivity.

19. The method of claim 15 , wherein the ITC layer is a Graphite ITC layer.

20. The method of claim 15 , wherein the ITC layer basal planes are positioned horizontally where the ITC layer contacts an upper surface of the IC chip cover.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LI, SHIDONG; SIKKA, KAMAL K.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 046644/0218 →
Cited By (2)
US 12,532,738 US 12,588,499