Circuit for generating a plurality of reference voltages for controlling feedback within the circuit

1. A circuit comprising:

an input terminal configured to receive an input-signal;

an output terminal configured to provide an output-signal;

a reference circuit comprising:

a first output terminal configured to provide a first-reference-signal;

a second output terminal configured to provide a second-reference-signal; and

a third output terminal configured to provide a third-reference-signal,

wherein:

the first-reference-signal varies between a high-value and a low-value;

the second-reference-signal is generated to demarcate signal levels below the low-value;

the third-reference-signal is generated to demarcate signal levels above the high-value,

a comparator-block configured to compare a comparator-input-voltage-signal representative of the input-signal received at the input terminal with:

(i) the first-reference-signal,

(ii) the second-reference-signal and

(iii) the third-reference-signal in order to generate a comparison-signal;

a control-block configured to set the output-signal as one of at least two voltage levels based on the comparison-signal; and

an input-control-circuit configured to apply a feedback-control-signal to the input-terminal based on the comparison-signal.

2. The circuit of claim 1 , wherein

the reference circuit comprises a fourth output terminal configured to provide a fourth-reference-signal that varies between the high-value and the low-value, and

the comparison signal is generated based on a comparison between the comparator-input-voltage-signal and the fourth-reference-signal.

3. The circuit of claim 2 ,

wherein the control-block is configured to set the output-signal as one of at least three voltage levels based on the comparison-signal.

4. The circuit of claim 2 ,

wherein the first-reference-signal is periodic and comprises:

a low-signal-portion with a bottom-level configured to demarcate signal levels below the low-value;

a rising-signal-portion that rises from the bottom-level via a midpoint-level to a top-level;

a high-signal-portion at the top-level, configured to demarcate signal levels above the high-value;

a falling-signal-portion that falls from the top-level via the midpoint-level to the bottom-level; and

wherein the each of the second-reference-signal, the third-reference-signal and the fourth-reference-signal comprise different phase shifted representations of the first-reference-signal.

5. The circuit of claim 4 , wherein:

the second-reference-signal is phase shifted by one quarter of the period of the first-reference-signal;

the third-reference-signal is phase shifted by one half of the period;

the fourth-reference-signal is phase shifted by three quarters of the period.

6. The circuit of claim 2 ,

wherein the first-reference-signal is periodic and comprises:

a rising-signal-portion that rises from a bottom-level via a midpoint-level to a top-level;

a falling-signal-portion that falls from the top-level via the midpoint-level to the bottom-level;

wherein:

the fourth-reference signal is an inverted, or a phase shifted, representation of the first-reference-signal;

the second-reference-signal is a low-signal-portion, representative of the low-value; and

the third-reference-signal is a high-signal-portion, representative of the high-value.

7. The circuit of claim 4 , wherein the output-signal is set:

to a ground-voltage-level if the comparator-input-signal crosses a rising-signal-portion below the midpoint-level;

to a middle-voltage-level, greater than the ground-voltage-level, if the comparator-input-voltage-signal crosses a falling-signal-portion below the midpoint-level;

to a boost-voltage-level, greater than the middle-voltage-level, if the comparator-input-voltage-signal crosses a falling-signal-portion above the midpoint-level; and

to the middle-voltage-level if the comparator-input-voltage-signal crosses a rising-signal-portion above the midpoint-level.

8. The circuit of claim 1 ,

wherein the input-control-circuit comprises a pulse-block configured to apply a pulse to the input-terminal if the comparator-input-voltage-signal is either greater than the high-value, or less than the low-value.

9. The circuit of claim 8 ,

wherein when the comparator-input-voltage-signal is greater than the high-value, the pulse is configured to be subtracted from the input-signal until the comparator-input-voltage-signal reaches the high-value.

10. The circuit of claim 8 ,

wherein when the comparator-input-voltage-signal is less than the low-value, the pulse is configured to be added to the input-signal until the comparator-input-voltage-signal reaches the low-value.

11. The circuit of claim 7 ,

further comprising an integrator coupled to the input-terminal and the output-terminal,

the integrator configured to generate the comparator-input-voltage-signal by integrating a difference between the input-signal and the output-signal.

12. The circuit of claim 11 ,

wherein the integrator comprises a reference-node coupled to a supply voltage that is half the middle-voltage-level.

13. The circuit of claim 1 ,

further comprising:

a second-input-terminal configured to receive a second-input-signal; and

a second-output-terminal configured to provide a second-output-signal,

wherein:

the comparator-block is configured to compare a second-comparator-input-voltage-signal representative of the second-input-signal received at the second-input-terminal with:

(i) the first-reference-signal,

(ii) the second-reference-signal,

(iii) the third-reference-signal and optionally

(iv) a fourth-reference-signal, in order to generate the comparison-signal;

the control-block is configured to set the second-output-signal as one of at least two voltage levels based on the comparison-signal; and

the input-control-circuit is configured to apply a second-feedback-control-signal to the second-input-terminal based on the comparison-signal.

14. The circuit of claim 13 ,

wherein the input-control-circuit comprises a common-current-pulse-block configured to apply a common-current-pulse to the input-terminal and the second-input-terminal if the comparator-input-voltage-signal is less than the low-value or if the second-comparator-input-voltage-signal is less than the low value.

15. The circuit of claim 13 ,

wherein the input-control-circuit comprises a single-ended-current-pulse-block configured to apply a single-ended-current-pulse to:

the input-terminal, if the comparator-input-voltage-signal is greater than the high-value; or

the second-feedback-input-terminal, if the second-comparator-input-voltage-signal is greater than the high-value.