SiC epitaxial wafer, manufacturing apparatus of SiC epitaxial wafer, fabrication method of SiC epitaxial wafer, and semiconductor device
A SiC epitaxial wafer includes: a substrate having an off angle of less than 4 degrees; and a SiC epitaxial growth layer disposed on the substrate having the off angle of less than 4 degrees, wherein an Si compound is used for a supply source of Si, and a C compound is used as a supply source of C, for the SiC epitaxial growth layer, wherein the uniformity of carrier density is less than 10%, and the defect density is less than 1 count/cm 2 ; and a C/Si ratio of the Si compound and the C (carbon) compound is within a range of 0.7 to 0.95. There is provide a high-quality SiC epitaxial wafer excellent in film thickness uniformity and uniformity of carrier density, having the small number of surface defects, and capable of reducing costs, also in low-off angle SiC substrates on SiC epitaxial growth.
1. A semiconductor device comprising:
a SiC epitaxial wafer comprising a substrate having low-off angle of less than 4 degrees, and a SiC epitaxial growth layer disposed on the substrate;
a gate trench formed at a surface of the SiC epitaxial growth layer;
a gate insulating film formed at an inner surface of the gate trench;
a gate electrode embedded in the gate trench;
an interlayer insulating film formed on/over the SiC epitaxial growth layer so as to cover entirely of the gate electrode and partly of the SiC epitaxial growth layer; and
a source electrode formed on/over the SiC epitaxial growth layer, wherein
a Si (silicon) compound is used for a supply source of silicon, and a C (carbon) compound is used as a supply source of carbon, for the SiC epitaxial growth layer, wherein
a C/Si ratio between the Si compound and the C compound is within a range of 0.7 to 0.95, wherein
the SiC epitaxial growth layer comprises
a buffer layer disposed on the substrate, and
a drift layer disposed on the buffer layer, wherein
the C/Si ratio of the Si compound and the C compound in the buffer layer is controlled to be lower than the C/Si ratio of the Si compound and the C compound in the drift layer.
2. The semiconductor device according to claim 1 , wherein
the uniformity of carrier density is less than 10%, and the defect density is less than 0.5 count/cm 2 .
3. The semiconductor device according to claim 1 , wherein
the off angle is 2 degrees.
4. The semiconductor device according to claim 1 , wherein
a growth temperature of the SiC epitaxial growth layer is within a range of 1630° C. to 1690° C.
5. The semiconductor device according to claim 1 , wherein
a growth pressure of the SiC epitaxial growth layer is within a range of 3 kPa to 11 kPa.
6. The semiconductor device according to claim 1 , wherein
the Si compound comprises at least one material selected from the group consisting of SiH 4 , SiH 3 F, SiH 2 F 2 , SiHF 3 , and SiF 4 .
7. The semiconductor device according to claim 1 , wherein
the C compound comprises at least one material selected from the group consisting of C 3 H 8 , C 2 H 4 , C 2 H 2 , CF 4 , C 2 F 6 , C 3 F 8 , C 4 F 6 , C 4 F 8 , C 5 F 8 , CHF 3 , CH 2 F 2 , CH 3 F, and C 2 HF 5 .
8. The semiconductor device according to claim 1 , wherein
the SiC epitaxial growth layer comprises at least one material selected from the group consisting of 4H—SiC, 6H—SiC, 2H—SiC, and 3C—SiC.
9. The semiconductor device according to claim 1 , wherein
a diameter of the substrate is equal to or greater than 100 mm.
10. The semiconductor device according to claim 1 , wherein
the substrate comprises at least one material selected from the group consisting of 4H—SiC, 6H—SiC, BN, AlN, Al 2 O 3 , Ga 2 O 3 , diamond, carbon, and graphite.
11. The semiconductor device according to claim 1 , wherein
the substrate and the SiC epitaxial growth layer have a first conductivity type,
a second conductivity type body region is formed at a side surface of the gate trench, and
a first conductivity type source region is formed at the surface of the SiC epitaxial growth layer.
12. The semiconductor device according to claim 11 , wherein the first conductivity type is n-type and the second conductivity type is p-type.
13. The semiconductor device according to claim 11 , wherein an impurity concentration of the first conductivity type substrate is approximately 1×10 18 cm −3 to approximately 1×10 21 cm −3 .
14. The semiconductor device according to claim 11 , wherein an impurity concentration of the first conductivity type SiC epitaxial growth layer is approximately 5×10 14 cm −3 to approximately 5×10 16 cm −3 .
15. The semiconductor device according to claim 11 , wherein an impurity concentration of the second conductivity type body region is approximately 1×10 16 cm −3 to approximately 1×10 19 cm −3 .
16. The semiconductor device according to claim 1 , wherein a thickness of the substrate is approximately 200 μm to approximately 500 μm.
17. The semiconductor device according to claim 1 , wherein a thickness of the SiC epitaxial growth layer is approximately 4 μm to approximately 100 μm.
18. The semiconductor device according to claim 1 , wherein a diameter of the substrate is approximately 150 mm.
19. The semiconductor device according to claim 1 , wherein a surface-roughness defect density including particles on a surface of the SiC epitaxial growth layer is equal to or less than 0.07 cm −2 .