IP Library › Granted Patent US 10,572,397
Granted Patent B2
US 10,572,397 · App. 15/283,114 · Granted Feb 25, 2020

Masking storage device presence

Inventors: Michael S. Bunker (Houston, TX); Michael White (Houston, TX)
Assignee: Hewlett Packard Enterprise Development LP
G06F13/102G06F13/4022G06F13/4282G06F13/385
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Quick Facts
Patent No.
US 10,572,397
App. No.
15/283,114
Granted
Feb 25, 2020
Kind
B2
Abstract

An example method to hide a presence of a storage device is provided herein. The method masks the presence of the storage device using a microcontroller that controls a presence bit. The method unmasks the presence of the storage device using the array controller to instruct the microcontroller to change the value of the presence bit after installation is complete.

Claims (30)

1. A system for masking a presence of a storage device comprising:

a receptacle to receive the storage device, the receptacle connected to a backplane, wherein the backplane includes a storage device connection;

a microcontroller coupled to the receptacle, the microcontroller to control a presence bit, the presence bit set to mask the presence of the storage device; and

an array controller coupled to the microcontroller, the array controller set to install a driver on the storage device and cause the microcontroller to unmask the presence bit on the microcontroller upon completion of installation, wherein the driver is not included with an operating system of the system.

2. The system of claim 1 , wherein the storage device comprises a solid state drive.

3. The system of claim 2 , wherein the solid state drive is a Non-Volatile Memory Express (NVMe) drive.

4. The system of claim 1 , wherein the storage connection is a Peripheral Component Interface Express (PCIe) connection.

5. The system of claim 1 , wherein the microcontroller hides the presence of the storage device by keeping the storage device in a PCIe reset state.

6. The system of claim 1 , wherein the microcontroller is coupled to the array controller via a PCIe switch.

7. The system of claim 1 , wherein the presence of the storage device is masked from an operating system on the system.

8. The system of claim 1 , further comprising two storage device connections associated with one microcontroller.

9. The system of claim 1 , wherein the microcontroller is a hot plug controller.

10. The system of claim 1 , wherein the storage device is configured by altering the storage device's PCIe ID.

11. The system of claim 1 , wherein the presence bit is altered in a Basic Input/Output System (BIOS).

12. A non-transitory machine readable memory resource storing instructions that when executed cause a physical processing resource to mask the presence of a storage device, the instructions comprising:

a presence bit instruction executable to set a presence bit to a value representing a mask state and an unmask state;

a storage device masking instruction executable to, in response to insertion of the storage device into a computing system and the value of the presence bit representing the mask state, place the storage device in a PCIe reset state and, in response to installation of a driver other than drivers included on an operating system of the computing system on the storage device by an array controller, remove the storage device from the PCIe reset state; and

a recognition instruction executable to write to the computing system.

13. The non-transitory machine readable memory resource of claim 12 , wherein the storage device masking instruction removes the storage device from a PCIe reset state when the presence bit is set to the unmasked state.

14. The non-transitory machine readable memory resource of claim 12 , wherein the computing system recognizes the storage device upon a write from the recognition instruction.

15. A method for hiding a presence of a storage device until the storage device is configured comprising:

adding the storage device to a system;

masking, by a hot plug controller, the presence of the storage device, wherein the hot plug controller controls a presence bit set to a value to instruct the microcontroller to hide the storage device;

configuring, by an array controller, a PCIe ID of the storage device and installing a driver on the storage device, wherein the driver is included on the array controller and is different than the drivers included with an operating system of the system;

in response to a completion of configuration of the storage device by the array controller, instructing, by the array controller, the hot plug controller to unmask the presence of the storage device; and

in response to a reception of an instruction from the array controller by the hot plug controller, unmasking, by the hot plug controller, the presence of the storage device by changing the value of the presence bit.

16. The method of claim 15 , wherein the storage device is an NVMe drive.

17. The method of claim 15 , wherein the presence bit is set by default to the value to instruct the hot plug controller to hide the storage device.

18. The method of claim 15 , wherein the driver enables the storage device to operate as part of a Redundant Array of Independent Disks (RAID).

19. The method of claim 15 , wherein the system is powered on prior to insertion of the storage device that is added.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2016
From: BUNKER, MICHAEL S.; WHITE, MICHAEL
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 040198/0090 →
Continuity (1)
Related Publication 20180095904A1 · Apr 5, 2018