IP Library Granted Patent US 10,580,110
Granted Patent B2
US 10,580,110 · App. 15/496,637 · Granted Mar 3, 2020

Hardware structure to track page reuse

Inventors: Jimshed Mirza (Toronto, CA); Al Hasanur Rahman (Newmarket, CA); Sergey Korobkov (Richmond Hill, CA); Houman Namiranian (Toronto, CA)
Assignee: ATI Technologies ULC
G06T1/60G06F13/24G06F12/1009G06F12/121
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Quick Facts
Patent No.
US 10,580,110
App. No.
15/496,637
Granted
Mar 3, 2020
Kind
B2
Abstract

Systems, apparatuses, and methods for tracking page reuse and migrating pages are disclosed. In one embodiment, a system includes one or more processors, a memory access monitor, and multiple memory regions. The memory access monitor tracks accesses to memory pages in a system memory during a programmable interval. If the number of accesses to a given page is greater than a programmable threshold during the programmable interval, then the memory access monitor generates an interrupt for software to migrate the given page from the system memory to a local memory. If the number of accesses to the given page is less than or equal to the programmable threshold during the programmable interval, then the given page remains in the system memory. After the programmable interval, the memory access monitor starts tracking the number of accesses to a new page in a subsequent interval.

Claims (59)

1. A system comprising:

a first memory;

a second memory; and

a plurality of control units;

wherein a first control unit is configured to:

count, in a first stage filter, X valid requests traversing a first memory channel, wherein X is a positive integer;

send a subsequent request to a second stage filter after counting X valid requests, wherein the second stage filter is configured to store a plurality of entries with each identifying a request and its corresponding age;

increment a counter if a first entry already exists in the second stage filter that corresponds to a first page targeted by the subsequent request;

responsive to detecting that the counter has reached a threshold:

generate a first interrupt that includes an identifier of the first memory channel via which the first page was accessed; and

cause the first page to be migrated from the first memory to the second memory.

2. The system as recited in claim 1 , wherein the first control unit is further configured to:

generate a first interrupt responsive to detecting that the counter in the first entry has exceeded the threshold; and

convey the first interrupt to a second control unit;

wherein the second control unit is configured to convey the first interrupt to an interrupt handler.

3. The system as recited in claim 2 , wherein the system comprises one or more processors, wherein program instructions executed by the one or more processors are configured to migrate the given page from the first memory to the second memory responsive to the interrupt handler receiving the first interrupt.

4. The system as recited in claim 1 , wherein the first control unit is configured to monitor accesses to a plurality of pages during a programmable interval.

5. The system as recited in claim 4 , wherein responsive to determining a given programmable interval for a given page has expired, the first control unit is configured to evict an entry for the given page from the table.

6. The system as recited in claim 1 , wherein in response to receiving the subsequent request, the second stage filter is configured to:

update a counter of a first entry of the plurality of entries, if the first entry includes data that matches the subsequent request;

evict an existing entry of the plurality of entries, if the subsequent request does not match any of the plurality of entries and all of the plurality of entries are currently occupied.

7. A method comprising:

counting, in a first stage filter of a first control unit, X valid requests traversing a first memory channel, wherein X is a positive integer;

sending a subsequent request to a second stage filter after counting X valid requests, wherein the second stage filter is configured to store a plurality of entries with each identifying a request and its corresponding age;

incrementing a counter if a first entry already exists in the second stage filter that corresponds to a first page targeted by the subsequent request;

responsive to detecting that the counter has reached a threshold:

generating a first interrupt that includes an identifier of the first memory channel via which the first page was accessed; and

causing the first page to be migrated from the first memory to the second memory.

8. The method as recited in claim 7 , further comprising:

generating a first interrupt responsive to detecting that the counter in the first entry has exceeded the threshold;

conveying the first interrupt to a second control unit; and

conveying the first interrupt from the second control unit to an interrupt handler.

9. The method as recited in claim 8 , further comprising migrating the given page from the first memory to the second memory responsive to the interrupt handler receiving the first interrupt.

10. The method as recited in claim 7 , further comprising monitoring accesses to a plurality of pages during a programmable interval.

11. The method as recited in claim 7 , wherein in response to receiving the subsequent request, the method comprising second stage filter:

updating a counter of a first entry of the plurality of entries, if the first entry includes data that matches the subsequent request;

evicting an existing entry of the plurality of entries, if the subsequent request does not match any of the plurality of entries and all of the plurality of entries are currently occupied.

12. The method as recited in claim 11 , wherein each page of the plurality of pages has a separate programmable interval.

13. An apparatus comprising:

a first memory;

a second memory;

one or more processors; and

a plurality of control units;

wherein a first control unit is configured to;

count, in a first stage filter, X valid requests traversing a first memory channel, wherein X is a positive integer;

send a subsequent request to a second stage filter after counting X valid requests, wherein the second stage filter is configured to store a plurality of entries with each identifying a request and its corresponding age;

increment a counter if a first entry already exists in the second stage filter that corresponds to a first page targeted by the subsequent request;

responsive to detecting that the counter has reached a threshold:

generate a first interrupt that includes an identifier of the first memory channel via which the first page was accessed; and

cause the first page to be migrated from the first memory to the second memory.

14. The apparatus as recited in claim 13 , wherein the first control unit is further configured to:

generate a first interrupt responsive to detecting that the counter in the first entry has exceeded the threshold; and

convey the first interrupt to a second control unit;

wherein the second control unit is configured to convey the first interrupt to an interrupt handler.

15. The apparatus as recited in claim 14 , wherein program instructions executed by the one or more processors are configured to migrate the given page from the first memory to the second memory responsive to the interrupt handler receiving the first interrupt.

16. The apparatus as recited in claim 13 , wherein the first control unit is configured to monitor accesses to a plurality of pages during a programmable interval.

17. The apparatus as recited in claim 13 , wherein in response to receiving the subsequent request, the second stage filter is configured to:

update a counter of a first entry of the plurality of entries, if the first entry includes data that matches the subsequent request;

evict an existing entry of the plurality of entries, if the subsequent request does not match any of the plurality of entries and all of the plurality of entries are currently occupied.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: MIRZA, JIMSHED; RAHMAN, AL HASANUR; KOROBKOV, SERGEY; NAMIRANIAN, HOUMAN
To: ATI TECHNOLOGIES ULC
Reel/Frame 042139/0673 →
Continuity (1)
Related Publication 20180308216A1 · Oct 25, 2018