IP Library › Granted Patent US 10,580,579
Granted Patent B2
US 10,580,579 · App. 16/008,865 · Granted Mar 3, 2020

Multilayer ceramic capacitor and method of manufacturing the same

Inventors: Seung Woo Song (Suwon-si, KR); Taek Jung Lee (Suwon-si, KR); Jin Kyung Joo (Suwon-si, KR); Hyo Youn Lee (Suwon-si, KR); Sung Kwon An (Suwon-si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H01G4/236H01G4/008H01G4/012H01G4/232H01G4/2325H01G4/252H01G4/30H01G4/1227
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Quick Facts
Patent No.
US 10,580,579
App. No.
16/008,865
Granted
Mar 3, 2020
Kind
B2
Abstract

A multilayer ceramic capacitor includes a body a first internal electrode and a second internal electrode disposed with a dielectric layer interposed therebetween, a first connecting electrode connected to the first internal electrode through the body, a second connecting electrode connected to the second internal electrode through the body, a first external electrode disposed on one surface of the body and connected to the first connecting electrode, and a second external electrode disposed on one surface of the body, spaced apart from the first external electrode, and connected to the second connecting electrode, wherein the first and second external electrodes each include a first electrode layer disposed on the body and including ceramics, and a second electrode layer disposed on the first electrode layer and having the content of ceramics smaller than that of the first electrode layer.

Claims (46)

1. A multilayer ceramic capacitor comprising:

a body including a first internal electrode and a second internal electrode disposed with a first dielectric layer interposed therebetween;

a second dielectric layer, without having the first and second internal electrodes, disposed on one of an upper surface or a lower surface of the body;

a first connecting electrode connected to the first internal electrode through the body and exposed from the second dielectric layer;

a second connecting electrode connected to the second internal electrode through the body and exposed from the second dielectric layer;

a first external electrode disposed on one surface of the second dielectric layer and connected to the first connecting electrode; and

a second external electrode disposed on the one surface of the second dielectric layer, spaced apart from the first external electrode, and connected to the second connecting electrode,

wherein the first and second external electrodes each include a first electrode layer disposed on the one surface of the second dielectric layer and including ceramics, and a second electrode layer disposed on the first electrode layer and having a content of ceramics smaller than that of the first electrode layer, and

the first electrode layer has a lower surface in contact with the second dielectric layer, an upper surface in contact with the second electrode layer, and side surfaces connecting the lower surface and the upper surface of the first electrode layer to each other and spaced apart from any dielectric layer of the multilayer ceramic capacitor.

2. The multilayer ceramic capacitor of claim 1 , wherein

the first electrode layer includes 70 to 85 wt % of metal and 15 to 30 wt % of ceramic, and the second electrode layer includes 90 to 98 wt % of metal and 2 to 10 wt % of ceramics.

3. The multilayer ceramic capacitor of claim 2 , wherein

the metal is one or more selected from among Cu, Ni, Sn, W, and Au.

4. The multilayer ceramic capacitor of claim 1 , wherein

the ceramics is the same material as a ceramic material included in the first dielectric layer.

5. The multilayer ceramic capacitor of claim 1 , wherein

the first and second external electrodes each further include a plating layer disposed on the second electrode layer.

6. The multilayer ceramic capacitor of claim 5 , wherein

side surfaces of the second electrode layer are exposed from the plating layer.

7. The multilayer ceramic capacitor of claim 1 , wherein

the first connecting electrode is separated from the second internal electrode by a first insulting portion, and the second connecting electrode is separated from the first internal electrode by a second insulating portion.

8. The multilayer ceramic capacitor of claim 1 , wherein

the first and second external electrodes are disposed only on the one surface of the second dielectric layer.

9. The multilayer ceramic capacitor of claim 1 , wherein

wherein the first and second internal electrodes are not exposed to an outer surface of the body.

10. A method of manufacturing a multilayer ceramic capacitor, the method comprising:

forming a body including a first internal electrode and a second internal electrode disposed with a dielectric layer interposed therebetween;

forming a second dielectric layer, without having the first and second internal electrodes, on one of an upper surface or a lower surface of the body;

forming first and second holes penetrating through the body and the second dielectric layer;

filling the first and second holes with a conductive material to form a first connecting electrode connected to the first internal electrode and a second connecting electrode connected to the second internal electrode; and

forming a first external electrode connected to the first connecting electrode, and a second external electrode spaced apart from the first external electrode and connected to the second connecting electrode, on one surface of the second dielectric layer,

wherein the forming of the first and second external electrodes includes:

forming a first electrode layer including ceramics on the one surface of the second dielectric layer; and

forming a second electrode layer having a content of ceramics smaller than that of the first electrode layer, on the first electrode layer, and

the first electrode layer has a lower surface in contact with the second dielectric layer, an upper surface in contact with the second electrode layer, and side surfaces connecting the lower surface and the upper surface of the first electrode layer and spaced apart from any dielectric layer of the multilayer ceramic capacitor.

11. The method of claim 10 , wherein

the first electrode layer includes 70 to 85 wt % of metal and 15 to 30 wt % of ceramic, and the second electrode layer includes 90 to 98 wt % of metal and 2 to 10 wt % of ceramics.

12. The method of claim 11 , wherein the metal is one or more selected from among Cu, Ni, Sn, W, and Au.

13. The method of claim 10 , wherein

the ceramics is the same material as a ceramic material included in the first dielectric layer.

14. The method of claim 10 , wherein

the forming of the first and second external electrodes further includes performing calcining and sintering after the second electrode layer is formed, and forming a plating layer on the second electrode layer.

15. The method of claim 14 , wherein

side surfaces of the second electrode layer are exposed from the plating layer.

16. The method of claim 10 , wherein

wherein the first and second internal electrodes are not exposed to an outer surface of the body.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2018
From: SONG, SEUNG WOO; LEE, TAEK JUNG; JOO, JIN KYUNG; LEE, HYO YOUN; AN, SUNG KWON
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 046093/0626 →
Priority Claims (1)
KR 10-2017-0114260 · Sep 7, 2017 · national
Continuity (1)
Related Publication 20190074138A1 · Mar 7, 2019
Cited By (1)
US 12,462,981