Reference voltage generator circuit
A reference voltage generator circuit ( 100 ) is disclosed, comprising a first transistor ( 101 ) having a first channel type and a second transistor ( 102 ) having a second channel type. A current source ( 104 ) is connected to a source terminal of the first transistor ( 101 ). A drain terminal of the second transistor ( 102 ) is connected to a drain terminal of the first transistor ( 101 ). The reference voltage generator circuit ( 100 ) further comprises a third transistor ( 103 ) having the second channel type, wherein a drain terminal of the third transistor ( 103 ) is connected to a source terminal of the second transistor ( 102 ). A node between the source terminal of the second transistor ( 102 ) and the drain terminal of the third transistor ( 103 ) is connected to a gate terminal of the first transistor ( 101 ). A connection for a reference voltage (Vrc) is provided between the current source ( 104 ) and the source terminal of the first transistor ( 101 ).
1. A reference voltage generator circuit comprising:
a first transistor having a first channel type and having source terminal, a drain terminal, and a gate terminal;
a current source connected to the source terminal of the first transistor;
a second transistor having a second channel type opposite the first channel type and having a source terminal, a drain terminal, and a gate terminal, wherein the drain terminal of the second transistor is connected to the drain terminal of the first transistor; and
a third transistor having the second channel type and having a source terminal, a drain terminal, and a gate terminal, wherein the drain terminal of the third transistor is connected to the source terminal of the second transistor, and a node between the source terminal of the second transistor and the drain terminal of the third transistor is connected to the gate terminal of the first transistor,
wherein the respective gate of each of the second and third transistors is connected to the drain of the second transistor, and
wherein a connection for a reference voltage is provided between the current source and the source terminal of the first transistor.
2. The reference voltage generator circuit of claim 1 , wherein a temperature dependence of the voltage at the node compensates for a temperature dependence of the first transistor.
3. The reference voltage generator circuit of claim 2 , wherein the geometrical sizes of the second and third transistors are selected such that the temperature dependence of the voltage at the node compensates for a temperature dependence of a gate-source voltage of the first transistor.
4. The reference voltage generator circuit of claim 2 , wherein the temperature dependence of the voltage at the node is configured to yield a pre-selected temperature coefficient of the reference voltage.
5. The reference voltage generator circuit of claim 4 , wherein the pre-selected temperature coefficient is positive, negative or zero.
6. The reference voltage generator circuit of claim 1 , wherein a bulk terminal of the first transistor is connected to the source terminal of the first transistor.
7. The reference voltage generator circuit of claim 1 , wherein at least one, or each, of the first, second, and third transistors is a MOSFET.
8. The reference voltage generator circuit of claim 1 , wherein the current source is configured to provide a current that varies by less than 1% over the temperature range of −40° C. to 90° C.
9. The reference voltage generator circuit of claim 1 , wherein the reference voltage varies by less than 1% over the temperature range of −40° C. to 90° C.
10. The reference voltage generator circuit of claim 1 , wherein the current source is configured to provide a current of 100 nA or less, or 50 nA or less, or 25 nA or less.
11. The reference voltage generator circuit of claim 1 , wherein the geometrical area of the reference voltage generator circuit is less than 200 μm 2 .
12. The reference voltage generator circuit of claim 1 , wherein the first channel type is p-channel and the second channel type is n-channel.
13. An RFID tag comprising the reference voltage generator circuit of claim 1 .
14. The reference voltage generator circuit of claim 1 , wherein the geometrical sizes of the second and third transistors are selected such that the temperature dependence of the voltage at the node is the opposite of a temperature dependence of a gate-source voltage of the first transistor.
15. The reference voltage generator circuit of claim 1 , wherein the current source includes a terminal connectable to a supply voltage.
16. The reference voltage generator circuit of claim 1 , wherein the current source includes a terminal connectable to ground.