IP Library Granted Patent US 10,586,793
Granted Patent B2
US 10,586,793 · App. 15/812,166 · Granted Mar 10, 2020

Semiconductor devices and methods for operating semiconductor devices

Inventors: Tomas Manuel Reiter (Munich, DE); Frank Wolter (Munich, DE)
Assignee: Infineon Technologies AG
H01L27/0664H01L21/77H01L22/12H01L22/14H01L29/41708H01L29/7395
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Quick Facts
Patent No.
US 10,586,793
App. No.
15/812,166
Granted
Mar 10, 2020
Kind
B2
Abstract

A semiconductor device includes a plurality of forward conducting insulated-gate bipolar transistor cells configured to conduct a current in a forward operating mode of the semiconductor device and to block a current in a reverse operating mode of the semiconductor device. The semiconductor device also includes a plurality of reverse conducting insulated-gate bipolar transistor cells configured to conduct a current both in the forward operating mode and in the reverse operating mode. A corresponding method for operating a semiconductor device is also disclosed.

Claims (29)

1. A semiconductor device, comprising:

a plurality of forward conducting insulated-gate bipolar transistor cells configured to conduct a current in a forward operating mode of the semiconductor device and to block a current in a reverse operating mode of the semiconductor device; and

a plurality of reverse conducting insulated-gate bipolar transistor cells configured to conduct a current both in the forward operating mode and in the reverse operating mode,

wherein the plurality of forward conducting insulated-gate bipolar transistor cells and the plurality of reverse conducting insulated-gate bipolar transistor cells are arranged in a common semiconductor substrate of the semiconductor device,

wherein the semiconductor substrate comprises a collector doping region of a first conductivity type and a drift doping region of a second conductivity type,

wherein the collector doping region separates the drift doping region from a backside surface of the semiconductor substrate within a forward conducting insulated-gate bipolar transistor cell,

wherein the drift doping region extends vertically to the backside surface of the semiconductor substrate within a reverse conducting insulated-gate bipolar transistor cell.

2. The semiconductor device of claim 1 , wherein a total number of forward conducting insulated-gate bipolar transistor cells of the semiconductor device is at least twice as large as a total number of reverse conducting insulated-gate bipolar transistor cells of the semiconductor device.

3. The semiconductor device of claim 1 , wherein during the forward operating mode the plurality of reverse conducting insulated-gate bipolar transistor cells is configured to conduct at most 30% of a total current through the semiconductor device.

4. The semiconductor device of claim 1 , wherein during the reverse operating mode the plurality of reverse conducting insulated-gate bipolar transistor cells is configured to conduct at most 30% of a total current through the semiconductor device.

5. The semiconductor device of claim 1 , further comprising:

a first emitter electrode electrically connected to at least one of the plurality of forward conducting insulated-gate bipolar transistor cells; and

a second emitter electrode electrically connected to at least one of the plurality of reverse conducting insulated-gate bipolar transistor cells.

6. The semiconductor device of claim 1 , wherein the plurality of forward conducting insulated-gate bipolar transistor cells laterally surrounds the plurality of reverse conducting insulated-gate bipolar transistor cells.

7. The semiconductor device of claim 1 , wherein a minimum lateral distance along the backside surface of the semiconductor substrate from any of the plurality of forward conducting insulated-gate bipolar transistor cells to a portion of the drift doping region located at the backside surface of the semiconductor substrate is larger than 1 μm.

8. The semiconductor device of claim 1 , wherein at least some of the plurality of reverse conducting insulated-gate bipolar transistor cells are arranged laterally adjacent to each other, and wherein a maximum width of the drift doping region at the backside surface of the semiconductor substrate is larger than a cell pitch of the adjacently arranged reverse conducting insulated-gate bipolar transistor cells.

9. The semiconductor device of claim 1 , further comprising a diode external to both the plurality of forward conducting insulated-gate bipolar transistor cells and the plurality of reverse conducting insulated-gate bipolar transistor cells, wherein the diode is configured to conduct at least 70% of a total current through the semiconductor device during the reverse operating mode.

10. A semiconductor device, comprising:

a plurality of forward conducting insulated-gate bipolar transistor cells configured to conduct a current in a forward operating mode of the semiconductor device and to block a current in a reverse operating mode of the semiconductor device;

a plurality of reverse conducting insulated-gate bipolar transistor cells configured to conduct a current both in the forward operating mode and in the reverse operating mode; and

a diode external to both the plurality of forward conducting insulated-gate bipolar transistor cells and the plurality of reverse conducting insulated-gate bipolar transistor cells,

wherein the diode is configured to conduct at least 70% of a total current through the semiconductor device during the reverse operating mode.

11. A semiconductor device, comprising:

a plurality of forward conducting insulated-gate bipolar transistor cells configured to conduct a current in a forward operating mode of the semiconductor device and to block a current in a reverse operating mode of the semiconductor device;

a plurality of reverse conducting insulated-gate bipolar transistor cells configured to conduct a current both in the forward operating mode and in the reverse operating mode;

a first emitter electrode contacting the plurality of forward conducting insulated-gate bipolar transistor cells at a first side of the semiconductor device;

a second emitter electrode contacting the plurality of reverse conducting insulated-gate bipolar transistor cells at the first side of the semiconductor device; and

a collector electrode contacting the plurality of forward conducting insulated-gate bipolar transistor cells and the plurality of reverse conducting insulated-gate bipolar transistor cells at a second side of the semiconductor device opposite the first side,

wherein the first emitter electrode is connected to a load source and the second emitter electrode is connected to a current sense source.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2018
From: REITER, TOMAS MANUEL; WOLTER, FRANK
To: INFINEON TECHNOLOGIES AG
Reel/Frame 044563/0376 →
Priority Claims (1)
DE 10 2016 121 912 · Nov 15, 2016 · national
Continuity (1)
Related Publication 20180138169A1 · May 17, 2018