Dynamic cache partitioning in a persistent memory module
Cache on a persistent memory module is dynamically allocated as a prefetch cache or a write back cache to prioritize read and write operations to a persistent memory on the persistent memory module based on monitoring read/write accesses and/or user-selected allocation.
1. A memory module comprising:
a persistent memory to store data;
a cache; and
control logic coupled to the persistent memory and the cache, the control logic to monitor write and read accesses to/from the persistent memory and to dynamically partition the cache to assign a first portion of the cache for read cache and a second portion of the cache for write cache based on monitored read and write accesses to prioritize read and write operations to the persistent memory, the control logic to monitor a hit rate in the first portion of the cache and to reduce a size of the first portion of the cache and to increase a size of the second portion of the cache if the hit rate is below a minimum threshold.
2. The memory module of claim 1 , wherein the control logic to monitor an age of write cache lines in the second portion of the cache and to increase the size of the second portion of the cache and decrease the size of the first portion of the cache if the age of the write cache lines is below a minimum threshold.
3. The memory module of claim 1 , wherein N-bytes of data are transferred to/from the memory module per transfer and M times N-bits of data are transferred between persistent memory and cache per intra-memory module transfer.
4. The memory module of claim 3 , wherein N is 64 and M is 4.
5. The memory module of claim 1 , wherein the memory module is a dual-in-line memory module.
6. A method comprising:
monitoring write accesses to a persistent memory in a memory module;
monitoring read accesses from the persistent memory;
prioritizing read and write operations to the persistent memory by dynamically partitioning a cache in the memory module to assign a first portion of the cache for read cache and a second portion of the cache for write cache based on monitored read and write accesses to the persistent memory;
monitoring a hit rate in the first portion of the cache; and
reducing a size of the first portion of the cache and increasing a size of the second portion of the cache if the hit rate in the first portion of the cache is below a minimum threshold.
7. The method of claim 6 , further comprising:
monitoring an age of cache lines in the second portion of the cache; and
increasing the size of the second portion of the cache and decreasing the size of the first portion of the cache if the age of the cache lines is below a minimum threshold.
8. The method of claim 6 , wherein N-bytes of data are transferred to/from the memory module per transfer and M*N-bits of data are transferred between persistent memory and cache per intra-memory module transfer.
9. The method of claim 8 , wherein N is 64 and M is 4.
10. The method of claim 6 , wherein the memory module is a dual-in-line memory module.
11. A system comprising:
a memory module comprising:
a persistent memory to store data;
a cache; and
control logic coupled to the persistent memory and the cache, the control logic to monitor write and read accesses to/from the persistent memory and to dynamically partition the cache to assign a first portion of cache for read cache and a second portion of the cache for write cache based on monitored read and write accesses to prioritize read and write operations to the persistent memory; and
a memory controller communicatively coupled to the memory module to generate a request for a write access or a read access to/from the memory module, the control logic to monitor a hit rate in read cache lines in the first portion of the cache and to reduce a size of the first portion of the cache and to increase a size of the second portion of the cache if the hit rate is below a minimum threshold.
12. The system of claim 11 , wherein the control logic to monitor an age of write cache lines in the second portion of the cache and to increase the size of the second portion of the cache assigned for write cache and decrease the size of the first portion of the cache assigned to read cache if the age of the write cache lines is below a minimum threshold.
13. The system of claim 11 , wherein N-bytes of data are transferred to/from the memory module per transfer and M times N-bits of data are transferred between persistent memory and cache per intra-memory module transfer.
14. The system of claim 13 , wherein N is 64 and M is 4.
15. The system of claim 11 , wherein the memory module is a dual-in-line memory module.