Semiconductor device including oxide semiconductor
A semiconductor device including pixels arranged in a matrix of n rows and m columns, in which the pixels in the m-th column are shielded from light, is provided.
1. A semiconductor device comprising:
memory elements arranged in a matrix of n rows and m columns, where each of n and m is a natural number of 2 or more,
wherein each of the memory elements comprise a transistor whose channel formation region comprises an oxide semiconductor, and
wherein the semiconductor device performs vector matrix multiplication while canceling an effect due to dark current of the memory elements.
2. The semiconductor device according to claim 1 , wherein the memory elements are configured to output pulse, depending on a threshold, so that the semiconductor device performs vector matrix multiplication.
3. A semiconductor device comprising:
memory elements arranged in a matrix of n rows and m columns, where each of n and m is a natural number of 2 or more; and
reference memory elements that are shielded from light,
wherein each of the memory elements comprise a transistor whose channel formation region comprises an oxide semiconductor, and
wherein the semiconductor device performs vector matrix multiplication while subtracting dark current of the reference memory elements.
4. The semiconductor device according to claim 3 , wherein the memory elements are configured to output pulse, depending on a threshold, so that the semiconductor device performs vector matrix multiplication.
5. A semiconductor device comprising:
memory elements arranged in a matrix of n rows and m columns, where each of n and m is a natural number of 2 or more,
wherein each of the memory elements comprise a transistor whose channel formation region comprises an oxide semiconductor,
wherein the semiconductor device performs vector matrix multiplication while canceling an effect due to dark current of the memory elements, and
wherein the semiconductor device performs smoothing processing, edge enhancement processing, or cosine transform by the vector matrix multiplication.
6. The semiconductor device according to claim 5 , wherein the memory elements are configured to output pulse, depending on a threshold, so that the semiconductor device performs vector matrix multiplication.