Semiconductor device having an emitter region and a contact region inside a mesa portion
A semiconductor device includes: a gate trench portion and a dummy trench portion provided extending in a predetermined direction of extension at the upper surface of the semiconductor substrate; a mesa portion sandwiched by the gate trench portion and the dummy trench portion; an emitter region provided between the upper surface of the semiconductor substrate and the drift region and provided at an upper surface of the mesa portion and adjacent to the gate trench portion; and a contact region provided between the upper surface of the semiconductor substrate and the drift region and provided at the upper surface of the mesa portion and adjacent to the dummy trench portion.
1. A semiconductor device comprising:
a semiconductor substrate having a first conductivity-type drift region;
a gate trench portion that is provided spreading from an upper surface of the semiconductor substrate and reaching an inside of the semiconductor substrate and is provided extending in a predetermined direction of extension at the upper surface of the semiconductor substrate;
a dummy trench portion that is provided spreading from the upper surface of the semiconductor substrate and reaching the inside of the semiconductor substrate and is provided extending in the direction of extension at the upper surface of the semiconductor substrate;
a mesa portion that is provided inside the semiconductor substrate and is sandwiched by the gate trench portion and the dummy trench portion;
a first conductivity-type emitter region that is provided inside the mesa portion and between the upper surface of the semiconductor substrate and the drift region, is provided at an upper surface of the mesa portion and directly contacts the gate trench portion and has a doping concentration higher than that of the drift region; and
a second conductivity-type contact region that is provided inside the mesa portion and between the upper surface of the semiconductor substrate and the drift region and is provided at the upper surface of the mesa portion and directly contacts the dummy trench portion, wherein
at least either the first conductivity-type emitter region or the second conductivity-type contact region is provided in a stripe shape extending in the direction of extension at the upper surface of the semiconductor substrate.
2. The semiconductor device according to claim 1 , further comprising a second conductivity-type base region that is provided inside the semiconductor substrate and between the upper surface of the semiconductor substrate and the drift region and has a doping concentration lower than that of the second conductivity-type contact region, wherein
the first conductivity-type emitter region and the second conductivity-type contact region are provided between the upper surface of the semiconductor substrate and the base region, and
the second conductivity-type contact region is provided reaching a position deeper than the first conductivity-type emitter region as seen from the upper surface of the semiconductor substrate.
3. The semiconductor device according to claim 2 , wherein at the upper surface of the semiconductor substrate, widths of the second conductivity-type contact region and the first conductivity-type emitter region in a direction perpendicular to the direction of extension are the same.
4. The semiconductor device according to claim 1 , wherein in a cross-section of the semiconductor substrate that is perpendicular to the direction of extension, an inclination of a cross-section boundary between the second conductivity-type contact region and the first conductivity-type emitter region relative to the upper surface of the semiconductor substrate is equal to or larger than 70 degrees and equal to or smaller than 110 degrees.
5. A semiconductor device comprising:
a semiconductor substrate having a first conductivity-type drift region;
a gate trench portion that is provided spreading from an upper surface of the semiconductor substrate and reaching an inside of the semiconductor substrate and is provided extending in a predetermined direction of extension at the upper surface of the semiconductor substrate;
a dummy trench portion that is provided spreading from the upper surface of the semiconductor substrate and reaching the inside of the semiconductor substrate and is provided extending in the direction of extension at the upper surface of the semiconductor substrate;
a mesa portion that is provided inside the semiconductor substrate and is sandwiched by the gate trench portion and the dummy trench portion;
a first conductivity-type emitter region that is provided inside the mesa portion and between the upper surface of the semiconductor substrate and the drift region, is provided at an upper surface of the mesa portion and adjacent to the gate trench portion and has a doping concentration higher than that of the drift region; and
a second conductivity-type contact region that is provided inside the mesa portion and between the upper surface of the semiconductor substrate and the drift region and is provided at the upper surface of the mesa portion and adjacent to the dummy trench portion, wherein
at least either the first conductivity-type emitter region or the second conductivity-type contact region is provided in a stripe shape extending in the direction of extension at the upper surface of the semiconductor substrate, and
in a depth direction perpendicular to the upper surface of the semiconductor substrate, a doping concentration distribution of the second conductivity-type contact region has a plurality of peaks.
6. The semiconductor device according to claim 5 , wherein in a depth direction perpendicular to the upper surface of the semiconductor substrate, a doping concentration distribution of the first conductivity-type emitter region has a plurality of peaks.
7. The semiconductor device according to claim 6 , wherein at respective peak positions of the doping concentration distribution of the second conductivity-type contact region, dopants having highest concentrations are the same type of dopant.
8. The semiconductor device according to claim 7 , wherein at any two peak positions of the doping concentration distribution of the first conductivity-type emitter region, dopants having highest concentrations are different types of dopant.
9. The semiconductor device according to claim 6 , wherein respective peak positions in the doping concentration distribution of the second conductivity-type contact region and respective peak positions in the doping concentration distribution of the first conductivity-type emitter region are different.
10. The semiconductor device according to claim 9 , wherein respective peak positions in the doping concentration distribution of the second conductivity-type contact region and respective peak positions in the doping concentration distribution of the first conductivity-type emitter region are arranged alternately in the depth direction.
11. The semiconductor device according to claim 2 , further comprising an accumulation region that is provided in the mesa portion and between the base region and the drift region and has a doping concentration higher than that of the drift region.
12. The semiconductor device according to claim 11 , comprising a first accumulation region of the accumulation regions and a second accumulation region of the accumulation regions, the first accumulation region and the second accumulation region being provided at different positions in a depth direction perpendicular to the upper surface of the semiconductor substrate.
13. A semiconductor device comprising:
a semiconductor substrate having a first conductivity-type drift region;
a gate trench portion that is provided spreading from an upper surface of the semiconductor substrate and reaching an inside of the semiconductor substrate and is provided extending in a predetermined direction of extension at the upper surface of the semiconductor substrate;
a dummy trench portion that is provided spreading from the upper surface of the semiconductor substrate and reaching the inside of the semiconductor substrate and is provided extending in the direction of extension at the upper surface of the semiconductor substrate;
a mesa portion that is provided inside the semiconductor substrate and is sandwiched by the gate trench portion and the dummy trench portion;
a first conductivity-type emitter region that is provided inside the mesa portion and between the upper surface of the semiconductor substrate and the drift region, is provided at an upper surface of the mesa portion and adjacent to the gate trench portion and has a doping concentration higher than that of the drift region; and
a second conductivity-type contact region that is provided inside the mesa portion and between the upper surface of the semiconductor substrate and the drift region and is provided at the upper surface of the mesa portion and adjacent to the dummy trench portion, wherein
at least either the first conductivity-type emitter region or the second conductivity-type contact region is provided in a stripe shape extending in the direction of extension at the upper surface of the semiconductor substrate, and
in the mesa portion, a trench contact portion that allows an emitter electrode to directly contact each of the first conductivity-type emitter region and the second conductivity-type contact region is provided spreading from the upper surface of the semiconductor substrate and reaching a position shallower than a bottom portion of the first conductivity-type emitter region.
14. The semiconductor device according to claim 13 , wherein in a region that is in the second conductivity-type contact region and contacts the trench contact portion, a second conductivity-type high concentration region having a doping concentration higher than that of the second conductivity-type contact region is provided.
15. The semiconductor device according to claim 1 , further comprising an interlayer dielectric film provided above the upper surface of the semiconductor substrate, wherein
the interlayer dielectric film is provided with a contact hole having a width, in a direction perpendicular to the direction of extension, which is larger than a width of the mesa portion.
16. A semiconductor device comprising:
a semiconductor substrate having a first conductivity-type drift region;
a plurality of trench portions that are provided spreading from an upper surface of the semiconductor substrate and reaching an inside of the semiconductor substrate and are provided extending in a predetermined direction of extension at the upper surface of the semiconductor substrate;
a mesa portion that is provided inside the semiconductor substrate and is sandwiched by two of the trench portions;
a first conductivity-type emitter region that is provided in the mesa portion and between the upper surface of the semiconductor substrate and the drift region and has a doping concentration higher than that of the drift region; and
a second conductivity-type contact region provided in the mesa portion and between the upper surface of the semiconductor substrate and the drift region, wherein
in a cross-section that is parallel with the direction of extension and perpendicular to the upper surface of the semiconductor substrate, an inclination of a cross-section boundary between the second conductivity-type contact region and the first conductivity-type emitter region relative to the upper surface of the semiconductor substrate is equal to or larger than 70 degrees and equal to or smaller than 110 degrees.
17. The semiconductor device according to claim 16 , wherein
at least either the first conductivity-type emitter region or the second conductivity-type contact region is provided in a stripe shape extending in the direction of extension at the upper surface of the semiconductor substrate.
18. The semiconductor device according to claim 5 , wherein
the first conductivity-type emitter region is further provided to directly contact the gate trench portion and has a doping concentration higher than that of the drift region; and
the second conductivity-type contact region is further provided to directly contact the dummy trench portion.
19. The semiconductor device according to claim 13 , further comprising an emitter electrode that contacts each of the first conductivity-type emitter region and the second conductivity-type contact region in the trench contact portion.
20. The semiconductor device according to claim 17 , wherein
the plurality of trench portions includes:
a gate trench portion that is provided spreading from an upper surface of the semiconductor substrate and reaching an inside of the semiconductor substrate and is provided extending in a predetermined direction of extension at the upper surface of the semiconductor substrate; and
a dummy trench portion that is provided spreading from the upper surface of the semiconductor substrate and reaching the inside of the semiconductor substrate and is provided extending in the direction of extension at the upper surface of the semiconductor substrate, wherein
the first conductivity-type emitter region is provided inside the mesa portion and between the upper surface of the semiconductor substrate and the drift region, and is provided at an upper surface of the mesa portion and adjacent to the gate trench portion and has a doping concentration higher than that of the drift region; and
a second conductivity-type contact region is provided inside the mesa portion and between the upper surface of the semiconductor substrate and the drift region, and is provided at the upper surface of the mesa portion and adjacent to the dummy trench portion.