IP Library › Granted Patent US 10,606,772
Granted Patent B2
US 10,606,772 · App. 15/954,838 · Granted Mar 31, 2020

USB2 high speed connection for testing

Inventors: Satheesh Chellappan (Folsom, CA); Kishore Kasichainula (Phoenix, AZ); Lay Cheng Ong (Georgetown, MY); Chee Lim Poon (Penang, MY); Harish G. Kamat (Gilbert, AZ)
Assignee: INTEL CORPORATION
G06F13/102G06F9/4403G06F13/4282G06F2213/0042
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,606,772
App. No.
15/954,838
Granted
Mar 31, 2020
Kind
B2
Abstract

In one example a Universal Serial Bus (USB) controller comprises at least one memory register to store one or more enumeration parameters for a USB connection with the USB controller and logic, at least partially including hardware logic, to detect a USB connection with a remote device via the USB connection, retrieve one or more connection enumeration parameters for the USB connection from the at least one memory register on the USB host controller, and implement a connection enumeration process using the one or more connection enumeration parameters retrieved from the memory register on the USB controller. Other examples may be described.

Claims (65)

1. A universal serial bus (USB) controller comprising:

at least one memory register to store one or more enumeration parameters for a USB connection with the USB controller; and

logic, at least partially including hardware logic, to:

detect a USB connection with a remote device via the USB connection;

retrieve one or more connection enumeration parameters for the USB connection from the at least one memory register on the USB host controller, the connection enumeration parameters comprising one or more pre-negotiated timing parameters for a USB enumeration process between the USB controller and the remote device; and

implement a connection enumeration process using the one or more connection enumeration parameters retrieved from the memory register on the USB controller, wherein the connection enumeration process is to bypass a USB chirp handshake process between the USB controller and the remote device.

2. The USB host controller of claim 1 , wherein the controller comprises:

a control status register.

3. The USB controller of claim 1 , wherein the connection enumeration parameters comprise at least one of:

a high speed enumeration mode parameter;

a preconfigured port speed parameter; and

a line termination enable time parameter.

4. The USB controller of claim 3 , wherein the line termination enable time parameter is programmable via a basic input/output system (BIOS).

5. The USB controller of claim 3 , wherein the logic is further configured to:

issue a USB reset; and

enable line termination after a time corresponding to the line termination enable time parameter elapses.

6. A universal serial bus (USB) subsystem for use with an electronic device, the subsystem comprising:

at least one USB port;

at least one memory register to store one or more enumeration parameters for a USB connection with the USB controller; and

logic, at least partially including hardware logic, to:

detect a USB connection with a remote device via the USB connection;

retrieve one or more connection enumeration parameters for the USB connection from the at least one memory register on the USB host controller, the connection enumeration parameters comprising one or more pre-negotiated timing parameters for a USB enumeration process between the USB controller and the remote device; and

implement a connection enumeration process using the one or more connection enumeration parameters retrieved from the memory register on the USB controller, wherein the connection enumeration process is to bypass a USB chirp handshake process between the USB controller and the remote device.

7. The USB subsystem of claim 6 , wherein the controller comprises:

a control status register.

8. The USB subsystem of claim 6 , wherein the connection enumeration parameters comprise at least one of:

a high speed enumeration mode parameter;

a preconfigured port speed parameter; and

a line termination enable time parameter.

9. The USB subsystem of claim 8 , wherein the line termination enable time parameter is programmable via a basic input/output system (BIOS).

10. The USB subsystem of claim 8 , wherein the logic is further configured to:

issue a USB reset; and

enable line termination after a time corresponding to the termination enable time parameter elapses.

11. An electronic device, comprising:

a processor; and

a universal serial bus (USB) host controller comprising:

at least one memory register to store one or more enumeration parameters for a USB connection with the USB host controller; and

logic, at least partially including hardware logic, to:

detect a USB connection with a USB device controller;

retrieve one or more connection enumeration parameters for a USB connection with the USB device controller from the at least one memory register on the USB host controller, the connection enumeration parameters comprising one or more pre-negotiated timing parameters for a USB enumeration process between the USB controller and the remote device; and

implement a connection enumeration process with the USB device controller using the one or more connection enumeration parameters retrieved from the memory register on the USB host controller, wherein the connection enumeration process is to bypass a USB chirp handshake process between the USB controller and the remote device.

12. The electronic device of claim 11 , wherein the host controller comprises:

a control status register.

13. The electronic device of claim 11 , wherein the connection enumeration parameters comprise at least one of:

a high speed enumeration mode parameter;

a preconfigured port speed parameter; and

a line termination enable time parameter.

14. The electronic device of claim 13 , wherein the line termination enable time parameter is programmable via a basic input/output system (BIOS).

15. The electronic device of claim 13 , wherein the logic is further configured to:

issue a USB reset; and

enable line termination after a time corresponding to the termination enable time parameter elapses.

16. A method to initiate a universal serial bus (USB) connection with a USB controller comprising:

detecting a USB connection with a remote device via the USB connection;

retrieving one or more connection enumeration parameters for the USB connection from at least one memory register on the USB host controller, the connection enumeration parameters comprising one or more pre-negotiated timing parameters for a USB enumeration process between the USB controller and the remote device; and

implementing a connection enumeration process using the one or more connection enumeration parameters retrieved from the memory register on the USB controller, wherein the connection enumeration process is to bypass a USB chirp handshake process between the USB controller and the remote device.

17. The method of claim 16 , wherein the controller comprises:

a control status register.

18. The method of claim 16 , wherein the connection enumeration parameters comprise at least one of:

a high speed enumeration mode parameter;

a preconfigured port speed parameter; and

a line termination enable time parameter.

19. The method of claim 18 , wherein the line termination enable time parameter is programmable via a basic input/output system (BIOS).

20. The method of claim 18 , further comprising:

issuing a USB reset; and

enabling line termination of the USB controller after a time corresponding to the termination enable time parameter elapses.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2018
From: CHELLAPPAN, SATHEESH; KASICHAINULA, KISHORE; ONG, LAY CHENG; POON, CHEE LIM; KAMAT, HARISH G.
To: INTEL CORPORATION
Reel/Frame 046006/0574 →
Priority Claims (1)
MY PI2017702578 · Jul 14, 2017 · national
Continuity (1)
Related Publication 20190018802A1 · Jan 17, 2019