Formation of air gap spacers for reducing parasitic capacitance
A method is presented for reducing parasitic capacitance. The method includes forming a source region and a drain region within a substrate, forming spacers in direct contact with sidewalls of a sacrificial layer, depositing an inter-layer dielectric (ILD) over the source and drain regions, replacing the sacrificial layer with a gate structure, removing the ILD, and depositing a sacrificial dielectric layer. The method further includes removing portions of the sacrificial dielectric layer to expose top surfaces of the source and drain regions, depositing a conductive material over the exposed top surfaces of the source and drain regions, and removing remaining portions of the sacrificial dielectric layer to form air gap spacers between the gate structure and the source and drain regions.
1. A method for reducing parasitic capacitance, the method comprising:
forming a source region and a drain region within a substrate;
forming spacers in direct contact with the source and drain regions, and the substrate;
depositing an inter-layer dielectric (ILD) over the source and drain regions;
forming a gate structure adjacent the spacers;
removing the ILD;
depositing a sacrificial dielectric layer in direct contact with the source and drain regions, and the spacers;
removing portions of the sacrificial dielectric layer to expose top surfaces of the source and drain regions and to define remaining portions of the sacrificial dielectric layer;
depositing a conductive material over the exposed top surfaces of the source and drain regions; and
removing the remaining portions of the sacrificial dielectric layer and applying a dielectric material to form air gap spacers between the gate structure and the conductive material.
2. The method of claim 1 , wherein the sacrificial dielectric layer is a germanium dioxide (GeO 2 ) layer.
3. The method of claim 1 , wherein the conductive material is recessed before removing the remaining portions of the sacrificial dielectric layer.
4. The method of claim 1 , wherein each of the air gap spacers extends along a length of the conductive material.
5. The method of claim 1 , wherein the air gap spacers extend from a top surface of the substrate to a top surface of the conductive material.
6. The method of claim 1 , wherein the air gap spacers are encapsulated by the dielectric material in direct contact with the source and drain regions, and the spacers.
7. The method of claim 6 , wherein the dielectric material is an oxide.
8. The method of claim 1 , wherein the remaining portions of the sacrificial dielectric layer are removed by employing deionized (DI) water.