IP Library › Granted Patent US 10,622,536
Granted Patent B2
US 10,622,536 · App. 15/934,457 · Granted Apr 14, 2020

Reducing qubit frequency collisions through lattice design

Inventors: Jerry M. Chow (White Plains, NY); Easwar Magesan (Mount Kisco, NY); Matthias Steffen (Cortlandt Manor, NY); Jay M. Gambetta (Yorktown Heights, NY); Maika Takita (Croton-on-Hudson, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L39/025G06N10/00H01L39/223
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Quick Facts
Patent No.
US 10,622,536
App. No.
15/934,457
Granted
Apr 14, 2020
Kind
B2
Abstract

Lattice arrangements for quantum qubits are described. A lattice arrangement can comprise adjacent structures having vertices connected by edges. The qubits can be positioned on the vertices. A qubit in the lattice arrangement directly connects to not more than three other qubits, or connects to another qubit via a coupling qubit on an edge between two qubits on a vertex. The adjacent structures can comprise hexagons, dodecagons or octagons. A superconducting qubit lattice can comprise superconducting target qubits and superconducting control qubits. The superconducting qubit lattice can comprise adjacent structures having vertices connected by edges, with target qubits positioned on the vertices and control qubits positioned on the edges. Logic operations between adjacent superconducting target and control qubits can be implemented by driving the superconducting control qubit at or near the frequency of the superconducting target qubit.

Claims (28)

1. A device comprising:

qubits arranged in a lattice arrangement, in which the lattice arrangement comprises adjacent structures having vertices connected by edges, wherein the qubits are positioned on the vertices, and wherein a qubit in the lattice arrangement directly connects to another qubit via a coupling qubit on an edge between two qubits on a vertex, wherein the qubits are non-Majoranas qubits.

2. The device of claim 1 , wherein the adjacent structures comprise hexagons.

3. The device of claim 1 , wherein the adjacent structures comprise hexagons having qubits on the edges between the vertices of the hexagons.

4. The device of claim 1 , wherein the adjacent structures comprise dodecagons.

5. The device of claim 1 , wherein the adjacent structures comprise dodecagons having qubits on the edges between the vertices of the dodecagons.

6. The device of claim 1 , wherein the adjacent structures comprise octagons.

7. The device of claim 1 , wherein the adjacent structures comprise octagons having qubits on the edges between the vertices of the octagons.

8. The device of claim 1 , wherein the adjacent structures comprise rectangles having qubits on the edges between the vertices of the rectangles.

9. The device of claim 1 , wherein the coupling qubit on the edge between the two qubits on the vertices comprises a control qubit, and wherein two qubits on the vertices comprise target qubits.

10. A superconducting qubit lattice, comprising:

superconducting target qubits, and superconducting control qubits, in which the superconducting qubit lattice comprises adjacent structures having vertices connected by edges, wherein the superconducting target qubits are positioned on the vertices and the superconducting control qubits are positioned on the edges, and wherein a first superconducting target qubit connects to a second superconducting target qubit via a superconducting control qubit on an edge between the first superconducting target qubit and the second superconducting target qubit.

11. The superconducting qubit lattice of claim 10 , wherein the adjacent structures comprise hexagons having superconducting control qubits on the edges between the vertices of the hexagons.

12. The superconducting qubit lattice of claim 10 , wherein the adjacent structures comprise dodecagons having superconducting control qubits on the edges between the vertices of the dodecagons.

13. The superconducting qubit lattice of claim 10 , wherein the adjacent structures comprise octagons having superconducting control qubits on the edges between the vertices of the octagons.

14. The superconducting qubit lattice of claim 10 , wherein the adjacent structures comprise rectangles having superconducting control qubits on the edges between the vertices of the rectangles.

15. A superconducting qubit lattice, comprising:

superconducting qubits, in which the superconducting qubit lattice comprises adjacent structures having vertices connected by edges, wherein the superconducting qubits are positioned on the vertices, and in which a superconducting qubit directly connects to not more than three other superconducting qubits, wherein the qubits are non-Marjoranas qubits.

16. The superconducting qubit lattice of claim 15 , wherein the adjacent structures comprise hexagons.

17. The superconducting qubit lattice of claim 15 , wherein the adjacent structures comprise dodecagons or octagons.

18. A superconducting qubit lattice, comprising:

superconducting target qubits, and superconducting control qubits, in which the superconducting qubit lattice comprises adjacent structures having vertices connected by edges, wherein the superconducting target qubits are positioned on the vertices and the superconducting control qubits are positioned on the edges, wherein a first superconducting target qubit directly connects to a second superconducting target qubit via a superconducting control qubit on an edge between the first superconducting target qubit and the second superconducting target qubit and wherein the superconducting control qubit is configured to be driven at or near a frequency of the superconducting target qubit to implement logic operations between adjacent superconducting target and control qubits, wherein the qubits are non-Majoranas qubits.

19. The superconducting qubit lattice of claim 18 , wherein the adjacent structures comprise hexagons.

20. The superconducting qubit lattice of claim 18 , wherein the adjacent structures comprise dodecagons, or wherein the adjacent structures comprise octagons.

21. The superconducting qubit lattice of claim 18 , wherein the adjacent structures comprise hexagons having superconducting control qubits on the edges between the vertices of the hexagons.

22. The superconducting qubit lattice of claim 18 , wherein the adjacent structures comprise dodecagons having superconducting control qubits on the edges between the vertices of the dodecagons.

23. The superconducting qubit lattice of claim 18 , wherein the adjacent structures comprise octagons having superconducting control qubits on the edges between the vertices of the octagons.

24. The superconducting qubit lattice of claim 18 , wherein the adjacent structures comprise rectangles having superconducting control qubits on the edges between the vertices of the rectangles.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2018
From: CHOW, JERRY M.; MAGESAN, EASWAR; STEFFEN, MATTHIAS; GAMBETTA, JAY M.; TAKITA, MAIKA
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 045332/0967 →
Continuity (1)
Related Publication 20190296211A1 · Sep 26, 2019
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