Authentication encryption method, authentication decryption method, and information-processing device
An information-processing device is provided with: a plaintext input unit for inputting plaintext; an initial vector generation unit for generating an initial vector; a common key block encryption unit for performing common key block encryption on the initial vector and generating an encrypted initial vector; a pseudorandom number generation unit which, accepting the encrypted initial vector as input, generates a pseudorandom number series in the same length as the plaintext; a keyed hash unit which, accepting the first portion of a ciphertext in which the pseudorandom number series and the plaintext are exclusive-OR'ed as input, generates a hash value; and a ciphertext output unit for concatenating the second and first portions of a ciphertext in which the hash value and the encrypted initial vector are exclusive-OR'ed and outputting the concatenated portions as a ciphertext.
1. An information processing device comprising:
a memory that stores a set of instructions; and
at least one processor configured to execute the set of instructions to:
input plaintext;
generate an initial vector;
generate an encrypted initial vector by performing shared key block encryption on the initial vector;
generate a pseudorandom number sequence having same length as the plaintext has using the encrypted initial vector as an input;
generate a hash value using, as an input, a first part of ciphertext obtained by taking an exclusive OR of the pseudorandom number sequence and the plaintext; and
combine and output, as ciphertext, a second part of the ciphertext obtained by taking an exclusive OR of the hash value and the encrypted initial vector and the first part.
2. The information processing device according to claim 1 , wherein the at least one processor is further configured to:
generate the initial vector value so as to be different from any past value, by generating an arbitrary fixed value first and generating, for the second time and thereafter, a value obtained by adding one to the initial vector value most recently generated.
3. The information processing device according to claim 1 , wherein the at least one processor is further configured to:
encrypt the initial vector of one block according to a shared key block cipher encryption function, and output an encrypted initial vector having same length as the initial vector has.
4. The information processing device according to claim 1 , wherein the at least one processor is further configured to:
generate the pseudorandom number sequence having same length as the plaintext has, by using the encrypted initial vector of one block, according to a fixed-length-input/variable-length-output pseudorandom function in a modified counter mode or a modified OFB mode.
5. The information processing device according to claim 1 , wherein the at least one processor is further configured to:
output the hash value using the first part as an input by a cipher-based message authentication code (CMAC) algorithm using a block cipher or a method of combining a polynomial hash over a finite field and block cipher encryption.
6. An information processing device comprising:
a memory that stores a set of instructions; and
at least one processor configured to execute the set of instructions to:
input plaintext;
generate an initial vector;
generate a hash value using the plaintext as an input;
generate a second part of ciphertext by performing shared key block encryption on a masked initial vector obtained by taking an exclusive OR of the initial vector and the hash value;
generate a pseudorandom number sequence having same length as the plaintext has using the second part as an input; and
combine and output, as ciphertext, a first part of the ciphertext obtained by taking an exclusive OR of the pseudorandom number sequence and the plaintext and the second part.
7. The information processing device according to claim 6 , wherein the at least one processor is further configured to:
generate the initial vector value so as to be different from any past value, by generating an arbitrary fixed value first and generating, for the second time and thereafter, a value obtained by adding one to the initial vector value most recently generated.
8. The information processing device according to claim 6 , wherein the at least one processor is further configured to:
output the hash value using the plaintext as an input by a cipher-based message authentication code (CMAC) algorithm using a block cipher or a method of combining a polynomial hash over a finite field and block cipher encryption.
9. The information processing device according to claim 6 , wherein the at least one processor is further configured to:
encrypt the masked initial vector according to a shared block cipher encryption function, and outputs the second part.
10. The information processing device according to claim 6 , wherein the at least one processor is further configured to:
generate the pseudorandom number sequence having same length as the plaintext has, by using the second part, according to a fixed-length-input/variable-length-output pseudorandom function in a modified counter mode or a modified OFB mode.
11. An information processing device comprising:
a memory that stores a set of instructions; and
at least one processor configured to execute the set of instructions to:
input ciphertext, separate the ciphertext into a first part and a second part, and output the first part and the second part;
generate a hash value using the first part as an input;
generate a pseudorandom number sequence having same length as the first part has using, as an input, an encryption initial vector obtained by taking an exclusive OR of the hash value and the second part of the ciphertext;
generate an initial vector by performing shared key block decryption on the encrypted initial vector;
input the decrypted initial vector and initial vector expected values, and check whether the decrypted initial vector and the initial vector expected values match;
output plaintext obtained by taking an exclusive OR of the pseudorandom number sequence and the first part when the decrypted initial vector and the initial vector expected values match;
output a signal of permitting an output of the plaintext, and updates the initial vector expected values to a value expected for next ciphertext, when the decrypted initial value and the initial vector expected values match;
output a signal of stopping an output of the plaintext, and maintain the initial vector expected values, when the decrypted initial vector and the initial vector expected values do not match; and
output the plaintext upon receipt of the signal of permitting, and output an error message upon receipt of the signal of stopping.
12. The information processing device according to claim 11 , wherein the second part is a single block at an end of the ciphertext, and the first part is a remaining block of the ciphertext.