IP Library › Granted Patent US 10,636,654
Granted Patent B2
US 10,636,654 · App. 15/947,202 · Granted Apr 28, 2020

Wafer-scale synthesis of large-area black phosphorus material heterostructures

Inventor: Fengnian Xia (Orange, CT)
Assignee: Yale University
H01L21/02631C01B25/006C01B25/023H01L21/02422H01L21/02521H01L21/6835H01L23/3157H01L29/26H01L29/786H01L29/78696H01L2221/68304
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Quick Facts
Patent No.
US 10,636,654
App. No.
15/947,202
Granted
Apr 28, 2020
Kind
B2
Abstract

A scalable approach for the synthesis of black phosphorus (BP) material thin films over large areas is described. A red phosphorus (RP) material thin film may be deposited on a substrate followed by conversion to a BP material thin film using high-pressure alone or high pressure and high temperature. A thin-film of dielectric material such as hexagonal boron nitride (hBN) can be formed on a RP material film before the conversion is performed to improve the crystalline quality and stability of the converted BP material. Surprisingly, an atomically sharp and defect-free interface can be formed between the converted BP material and hBN. The BP material has high crystalline uniformity and can be used to fabricate thin-film transistors and optoelectronic devices such as infrared photodetectors.

Claims (38)

1. A wafer comprising:

a substrate;

a layer of crystalline black phosphorous material formed over a first area of the substrate; and

a layer of dielectric material formed over the black phosphorous material in the first area, wherein a first interface between the black phosphorous material and the dielectric material extending for as much as one micron across the first area has fewer than 5 stacking faults in the black phosphorous material, wherein the layer of black phosphorous material covers at least 75% of a surface of the substrate.

2. The wafer of claim 1 , wherein the layer of black phosphorous material has regions of continuous coverage as large as 600 microns across a surface of the substrate.

3. The wafer of claim 1 , wherein the first area comprises a single crystal grain and has a minimum span across a surface of the substrate of 2 microns.

4. The wafer of claim 1 , wherein the first area comprises a single crystal grain and has a span across a surface of the substrate as large as 100 microns.

5. The wafer of claim 1 , wherein the dielectric material comprises hexagonal boron nitride or silicon nitride.

6. The wafer of claim 5 , wherein the black phosphorus material is uniformly crystalline throughout its thickness.

7. The wafer of claim 1 , wherein the dielectric material comprises aluminum oxide or hafnium oxide.

8. The wafer of claim 1 , wherein the black phosphorous material is uniformly crystalline from the first interface to a second interface between the crystalline black phosphorous material and the substrate.

9. The wafer of claim 8 , wherein a thickness of the black phosphorous material is between two atomic layers and 100 nanometers.

10. The wafer of claim 8 , wherein the first area comprises a single crystal grain and has a minimum span across a surface of the substrate of 2 microns.

11. The wafer of claim 10 , wherein a defect density in atomic layers of the black phosphorous material is between 10 cm −2 and 100 cm −2 .

12. The wafer of claim 1 , wherein the black phosphorous material exhibits electron or hole mobilities as much as 170 cm 2 V 4 s −1 .

13. The wafer of claim 1 , further comprising:

a drain electrode formed in electrical contact with the black phosphorous material at a first location within the first area;

a source electrode formed in electrical contact with the black phosphorous material at a second location within the first area; and

a gate electrode formed between the drain electrode and the source electrode for controlling current flow between the drain electrode and the source electrode.

14. The wafer of claim 1 , wherein the layer of black phosphorous material exhibits electron and hole mobilities between 100 cm 2 V −1 s −1 and 10,000 cm 2 V −1 s −1 .

15. The wafer of claim 1 , further comprising at least one additional layer of dielectric material or black phosphorous material formed over the first area to form a heterostructure stack of at least three layers.

16. The wafer of claim 15 , wherein the heterostructure stack comprises hBN/BP/hBN where hBN represents a film of hexagonal boron nitride and BP represents a film of black phosphorus material.

17. A wafer comprising:

a substrate;

a layer of crystalline black phosphorous material formed over a first area of the substrate; and

a layer of dielectric material formed over the black phosphorous material in the first area, wherein a first interface between the black phosphorous material and the dielectric material extending for as much as one micron across the first area has fewer than 5 stacking faults in the black phosphorus material, wherein the first area comprises a single crystal grain and has a span across a surface of the substrate as large as 100 microns.

18. The wafer of claim 17 , wherein the dielectric material comprises hexagonal boron nitride or silicon nitride.

19. The wafer of claim 17 , wherein a thickness of the black phosphorous material is between two atomic layers and 100 nanometers.

20. The wafer of claim 17 , further comprising at least one additional layer of dielectric material or black phosphorous material formed over the first area to form a heterostructure stack of at least three layers.

21. A wafer comprising:

a substrate;

a first layer of crystalline black phosphorous material formed over a first area of the substrate;

a layer of first dielectric material formed over the black phosphorous material in the first area, wherein a first interface between the black phosphorous material and the first dielectric material extending for as much as one micron across the first area has fewer than 5 stacking faults in the black phosphorus material; and

at least one additional layer of dielectric material or black phosphorous material formed over the first area to form a heterostructure stack of at least three layers.

22. The wafer of claim 21 , wherein the first dielectric material comprises hexagonal boron nitride or silicon nitride.

23. The wafer of claim 21 , wherein the first layer of black phosphorous material has regions of continuous coverage as large as 600 microns across a surface of the substrate.

24. The wafer of claim 23 , wherein a thickness of the black phosphorous material is between two atomic layers and 100 nanometers.

25. The wafer of claim 21 , wherein the first layer of black phosphorous material exhibits electron and hole mobilities between 100 cm 2 V −1 s −1 and 10,000 cm 2 V −1 s −1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2018
From: XIA, FENGNIAN
To: YALE UNIVERSITY
Reel/Frame 045961/0466 →
Continuity (2)
Provisional Application 62482333 · Apr 6, 2017
Related Publication 20180294156A1 · Oct 11, 2018
Cited By (2)
US 12,211,904 US 12,672,320