Wiring substrate
A wiring substrate includes a stack having a plurality of insulation layers and a plurality of wiring layers. Each of the plurality of insulation layer is formed by an insulative resin of which main component is a photosensitive resin. The plurality of insulation layers and the plurality of wiring layers are alternately stacked one upon another. The wiring substrate further includes a first insulation layer covering a lower surface of the stack and entirely covering a side surface of the stack. The first insulation layer has a higher rigidity than the plurality of insulation layers. An upper surface of the uppermost one of the plurality of wiring layers and an upper surface of the uppermost one of the plurality of insulation layers are exposed from the first insulation layer.
1. A wiring substrate comprising:
a stack including a plurality of insulation layers and a plurality of wiring layers, wherein each of the plurality of insulation layers is formed by an insulative resin of which main component is a photosensitive resin, and the plurality of insulation layers and the plurality of wiring layers are alternately stacked one upon another; and
a first insulation layer covering a lower surface of the stack and entirely covering a side surface of the stack, wherein the first insulation layer has a higher rigidity than the plurality of insulation layers,
wherein an upper surface of an uppermost wiring layer of the plurality of wiring layers and an upper surface of an uppermost insulation layer of the plurality of insulation layers are exposed from the first insulation layer;
a lowermost wiring layer of the plurality of wiring layers of the stack includes:
a via wiring extending through a lowermost insulation layer of the plurality of insulation layers of the stack; and
a metal post formed integrally with the via wiring and projecting downward from a lower surface of the lowermost insulation layer,
wherein the first insulation layer entirely covers and contacts a side surface of the metal post.
2. The wiring substrate according to claim 1 , wherein an upper surface of the first insulation layer is flush with the upper surface of the uppermost wiring layer and the upper surface of the uppermost insulation layer.
3. The wiring substrate according to claim 1 , wherein
the plurality of insulation layers include an upper insulation layer and a lower insulation layer that is vertically adjacent to the upper insulation layer,
the lower insulation layer is formed on a lower surface of the upper insulation layer and exposes a peripheral portion of the lower surface of the upper insulation layer, and
the first insulation layer entirely covers a side surface of the upper insulation layer, the lower surface of the upper insulation layer exposed from the lower insulation layer, and a side surface of the lower insulation layer.
4. The wiring substrate according to claim 1 , wherein
a lower surface of the lowermost wiring layer of the plurality of wiring layers is exposed from the first insulation layer, and
the lowermost wiring layer is thicker than each of other ones of the plurality of wiring layers.
5. The wiring substrate according to claim 1 , wherein
the upper surface of the uppermost wiring layer is flush with an upper surface of the first insulation layer, and
a lower surface of the lowermost wiring layer of the plurality of wiring layers is flush with a lower surface of the first insulation layer.
6. The wiring substrate according to claim 1 , further comprising:
a second insulation layer exposing the upper surface of the uppermost wiring layer, the upper surface of the uppermost insulation layer, and an upper surface of the first insulation layer and entirely covering a lower surface of the first insulation layer and an outer side surface of the first insulation layer;
a through hole formed in a lower surface of the second insulation layer and partially exposing a lower surface of the lowermost wiring layer of the plurality of wiring layers of the stack;
a via wiring with which the through hole is filled; and
a wiring pattern formed on the lower surface of the second insulation layer and electrically connected by the via wiring to the lowermost wiring layer.
7. The wiring substrate according to claim 6 , further comprising:
a wiring structure stacked on the lower surface of the second insulation layer, wherein the wiring structure includes
an insulation layer formed on the lower surface of the second insulation layer, wherein the insulation layer is formed by an insulative resin of which main component is a thermosetting resin, and
a wiring layer formed on the insulation layer.
8. The wiring substrate according to claim 6 , wherein the second insulation layer includes a recess in which the stack and the first insulation layer are embedded, the recess including
an inner side surface that is in contact with the outer side surface of the first insulation layer, and
an inner bottom surface that is in contact with the lower surface of the first insulation layer.
9. The wiring substrate according to claim 6 , wherein the second insulation layer is formed from a resin material that is the same as that of the first insulation layer.
10. The wiring substrate according to claim 1 , wherein
the first insulation layer covers a lower surface of the lowermost wiring layer of the plurality of wiring layers,
the first insulation layer includes a through hole formed in a lower surface of the first insulation layer and partially exposing the lower surface of the lowermost wiring layer, and
the wiring substrate further comprising:
a via wiring with which the through hole is filled; and
a wiring pattern formed on the lower surface of the first insulation layer and electrically connected by the via wiring to the lowermost wiring layer.
11. The wiring substrate according to claim 10 , further comprising
a wiring structure stacked on the lower surface of the first insulation layer, the wiring structure including:
wiring layers, an uppermost one of which including the wiring pattern;
insulation layers, each formed from an insulative resin of which main component is a thermosetting resin;
wherein the wiring layers and the insulation layers of the wiring structure are alternately stacked one upon another.
12. The wiring substrate according to claim 1 , further comprising:
a second insulation layer including a recess accommodating the stack and the first insulation layer, wherein the recess exposes the upper surface of the uppermost wiring layer, the upper surface of the uppermost insulation layer, and an upper surface of the first insulation layer and includes
an inner side surface that is spaced apart from an outer side surface of the first insulation layer, and
an inner bottom surface that is spaced apart from a lower surface of the first insulation layer;
a first wiring pattern formed on the inner bottom surface of the recess;
an anisotropic conductive film that electrically connects the lowermost wiring layer of the plurality of wiring layers and the first wiring pattern;
a second wiring pattern including an upper surface and a side surface that are covered by the second insulation layer and a lower surface that is exposed in a lower surface of the second insulation layer; and
a via wiring extending through the second insulation layer from a lower surface of the first wiring pattern and the upper surface of the second wiring pattern to connect the first wiring pattern and the second wiring pattern.