IP Library › Granted Patent US 10,637,207
Granted Patent B2
US 10,637,207 · App. 16/343,349 · Granted Apr 28, 2020

Directly modulated laser drive circuit

Inventors: Toshiki Kishi (Tokyo, JP); Munehiko Nagatani (Tokyo, JP); Shinsuke Nakano (Tokyo, JP); Hiroaki Katsurai (Tokyo, JP); Masafumi Nogawa (Tokyo, JP); Hideyuki Nosaka (Tokyo, JP)
Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
H01S5/0427H01S5/042H01S5/0687H01S5/06216H01S5/06226
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Quick Facts
Patent No.
US 10,637,207
App. No.
16/343,349
Granted
Apr 28, 2020
Kind
B2
Abstract

A driver circuit 11 includes a plurality of cascode-connected NMOS transistors, a modulating signal V GN1 is applied to a gate terminal of a lowermost stage transistor T N1 located at a lowermost stage out of the NMOS transistors, and an upper stage bias potential V GN2 that is a sum of a minimum gate-source voltage V GN1min and a maximum drain-source voltage V DS1max of a transistor (T N1 ) located immediately below an upper stage transistor located at an upper stage above the lowermost stage transistor of the NMOS transistors is applied to the upper stage transistor T N2 .

Claims (24)

1. A directly modulated laser driving circuit comprising:

a power supply circuit configured to supply a driving current to a laser diode; and

a driver circuit connected in parallel to the laser diode, configured to bypass the driving current in accordance with an input modulating signal,

wherein the driver circuit comprises a plurality of cascode-connected NMOS transistors,

the modulating signal is applied to a gate terminal of a lowermost stage transistor located at a lowermost stage out of the NMOS transistors, and

an upper stage bias potential that is a sum of a minimum gate-source voltage and a maximum drain-source voltage of a transistor located immediately below an upper stage transistor located at an upper stage above the lowermost stage transistor of the NMOS transistors is applied to a gate terminal of the upper stage transistor.

2. The directly modulated laser driving circuit according to claim 1 , wherein the power supply circuit comprises a constant current source connected between a constant voltage source and the laser diode.

3. The directly modulated laser driving circuit according to claim 1 , wherein the power supply circuit includes a high-frequency choke coil connected between a constant voltage source and the laser diode.

4. The directly modulated laser driving circuit according to claim 1 , wherein the power supply circuit includes a PMOS current control transistor connected between a constant voltage source and the laser diode, and is configured to control the driving current to be constant based on a current control bias potential.

5. The directly modulated laser driving circuit according to claim 4 , further comprising:

an upper stage decoupling circuit including an RC low-pass filter connected between the upper stage bias potential and the gate terminal of the upper stage transistor, and is configured to remove a high-frequency noise component;

a power supply decoupling circuit including an RC low-pass filter connected between the current control bias potential and the gate terminal of the PMOS current control transistor, and is configured to remove the high-frequency noise component; and

a decoupling capacitor connected between the drain terminal of the upper stage transistor and a ground potential.

6. The directly modulated laser driving circuit according to claim 4 , further comprising:

a series circuit including a resistive element and an inductor connected between a source terminal of the lowermost stage transistor and a ground potential;

a capacitor connected between the source terminal of the lowermost stage transistor and the ground potential; and

a high-pass filter including an input resistive element having one end applied with the current control bias potential and the other end connected to a gate terminal of the current control transistor, a capacitive element connected between the gate terminal of the current control transistor and a gate terminal of the lowermost stage transistor, and a series circuit including a resistive element and an inductor connected between the gate terminal of the lowermost stage transistor and the ground potential.

7. The directly modulated laser driving circuit according to claim 6 , further comprising:

an upper stage decoupling circuit including an RC low-pass filter connected between the upper stage bias potential and the gate terminal of the upper stage transistor, and is configured to remove a high-frequency noise component; and

a power supply decoupling circuit including an RC low-pass filter connected between the current control bias potential and the one end of the input resistive element, and is configured to remove the high-frequency noise component.

8. The directly modulated laser driving circuit according to claim 4 , further comprising:

a series circuit including a resistive element and an inductor connected between a source terminal of the lowermost stage transistor and a ground potential;

a capacitor connected between the source terminal of the lowermost stage transistor and the ground potential; and

a high-pass filter including an input capacitive element having one end applied with an in-phase signal of the modulating signal and the other end connected to a gate terminal of the current control transistor, a series circuit including a resistive element and an inductor connected between the one end of the capacitive element and the ground potential, and a resistive element connected between the current control bias potential and the other end of the capacitive element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2019
From: KISHI, TOSHIKI; NAGATANI, MUNEHIKO; NAKANO, SHINSUKE; KATSURAI, HIROAKI; NOGAWA, MASAFUMI; NOSAKA, HIDEYUKI
To: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Reel/Frame 048931/0985 →
Priority Claims (1)
JP 2016-205702 · Oct 20, 2016 · national
Continuity (1)
Related Publication 20190245624A1 · Aug 8, 2019