Semiconductor devices with doped regions functioning as enhanced resistivity regions or diffusion barriers, and methods of fabrication therefor
A semiconductor device includes a base substrate, a doped region at an upper surface of the base substrate, and a transistor over the upper surface of the base substrate and formed from a plurality of epitaxially-grown semiconductor layers. The doped region includes one or more ion species, and has a lower boundary above a lower surface of the base substrate. The base substrate may be a silicon substrate, and the transistor may be a GaN HEMT formed from a plurality of heteroepitaxial layers that include aluminum nitride and/or aluminum gallium nitride. The doped region may be a diffusion barrier region and/or an enhanced resistivity region. The ion species may be selected from phosphorus, arsenic, antimony, bismuth, argon, helium, nitrogen, and oxygen. When the ion species includes oxygen, the doped region may include a silicon dioxide layer formed from annealing the doped region after introduction of the oxygen.
1. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region includes one or more ion species, and the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and an upper boundary that coincides with the upper surface of the base semiconductor substrate; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers, wherein the first doped region does not extend into the plurality of epitaxially-grown semiconductor layers, wherein the transistor is a high electron mobility transistor (HEMT), which includes
a nucleation layer disposed over the first doped region,
a first semiconductor layer disposed over the nucleation layer,
a second semiconductor layer disposed over the first semiconductor layer, and
a channel within the second semiconductor layer and proximate to an upper surface of the second semiconductor layer.
2. The semiconductor device of claim 1 , wherein:
the base semiconductor substrate is a silicon substrate; and
the HEMT is a gallium nitride (GaN) HEMT formed from a plurality of heteroepitaxial layers that include one or more materials selected from aluminum nitride and aluminum gallium nitride.
3. The semiconductor device of claim 1 , wherein the one or more ion species within the first doped region have a dopant concentration between 10 15 cm −3 and 10 19 cm −3 .
4. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface, wherein the base semiconductor substrate comprises a high-resistivity, not-intentionally-doped (NID), silicon substrate with a <1 1 1> crystal lattice orientation;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region includes one or more ion species, and the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers.
5. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region includes one or more ion species, the first doped region is a diffusion barrier region, the one or more ion species are selected from phosphorus, arsenic, antimony, and bismuth, and the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and an upper boundary that coincides with the upper surface of the base semiconductor substrate; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers, wherein the first doped region does not extend into the plurality of epitaxially-grown semiconductor layers.
6. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region includes one or more ion species, the first doped region is an enhanced resistivity region, the one or more ion species are selected from argon, helium, nitrogen, and oxygen, and the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and an upper boundary that coincides with the upper surface of the base semiconductor substrate; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers, wherein the first doped region does not extend into the plurality of epitaxially-grown semiconductor layers.
7. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region includes one or more ion species, the one or more ion species includes oxygen, the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and the first doped region is an enhanced resistivity region that includes a silicon dioxide layer formed from annealing the first doped region after introduction of the oxygen; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers.
8. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region includes one or more ion species, the first doped region is located at and below the upper surface of the base semiconductor substrate, the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and an upper boundary that coincides with the upper surface of the base semiconductor substrate, and the first lower boundary is in a range of 500 angstroms to 100,000 angstroms below the upper surface of the base semiconductor substrate; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers, wherein the first doped region does not extend into the plurality of epitaxially-grown semiconductor layers.
9. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region includes one or more ion species, the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and an upper boundary that coincides with the upper surface of the base semiconductor substrate, the first doped region is located in a heteroepitaxial semiconductor layer coupled to the upper surface of the base semiconductor substrate, and a thickness of the heteroepitaxial semiconductor layer is in a range of 500 angstroms to 100,000 angstroms; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers, wherein the first doped region does not extend into the plurality of epitaxially-grown semiconductor layers.
10. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region is a diffusion barrier region that is present at an active region of the device, the first doped region includes one or more ion species, and the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and wherein the first doped region is present at first selected areas of the base semiconductor substrate, and is not present at other areas of the base semiconductor substrate; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers.
11. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region is an enhanced resistivity region that is present at an inactive region of the device, the first doped region includes one or more ion species, and the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and wherein the first doped region is present at first selected areas of the base semiconductor substrate, and is not present at other areas of the base semiconductor substrate; and
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers.
12. A semiconductor device comprising:
a base semiconductor substrate including an upper surface and a lower surface;
a first doped region at the upper surface of the base semiconductor substrate, wherein the first doped region includes one or more ion species, and the first doped region has a first lower boundary that is located above the lower surface of the base semiconductor substrate, and wherein the first doped region is present at first selected areas of the base semiconductor substrate, and is not present at other areas of the base semiconductor substrate;
a transistor over the upper surface of the base semiconductor substrate and formed from a plurality of epitaxially-grown semiconductor layers; and
a second doped region at the upper surface of the base semiconductor substrate, wherein the second doped region includes the one or more ion species, and the second doped region has a second lower boundary that is located above the lower surface of the base semiconductor substrate, and
wherein the first doped region is a diffusion barrier region that is present at an active region of the device, and the second doped region is an enhanced resistivity region that is present at an inactive region of the device.
13. The semiconductor device of claim 12 , wherein the one or more ion species in the first doped region are different from the one or more ion species in the second doped region.