Quantizing circuits having improved sensing
A system including a processor and a memory device. The memory device includes a memory array having a plurality of memory elements connected to a bit-line and a quantizing circuit. The quantizing circuit includes a combination circuit configured to combine an analog input signal with an analog feedback signal to produce a delta signal. The quantizing circuit also includes an integrator configured to receive and integrate the delta signal to produce a sigma signal. The quantizing circuit also includes an analog-to-digital converter configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal.
1. A method, comprising:
generating a first signal in response to light impinging upon an imaging element;
combining the first signal with an analog feedback signal to produce a delta signal;
integrating the delta signal to produce a sigma signal;
comparing the sigma signal with a reference signal to produce a digital output signal.
2. The method of claim 1 , comprising generating a value associated with the first signal based on the digital output.
3. The method of claim 1 , comprising converting the digital output signal to an analog output signal.
4. The method of claim 3 , comprising updating a value of the analog feedback signal with a value of the analog output signal.
5. The method of claim 1 , comprising transmitting the digital output signal to a counter.
6. The method of claim 5 , comprising incrementing or decrementing a count at the counter based on the digital output signal received.
7. The method of claim 6 , comprising outputting a second signal indicative of the count, wherein the second signal corresponds to a level of intensity of the light impinging upon the imaging element.
8. A device, comprising:
a data location;
a reference current source; and
a quantizing circuit coupled to the data location and the reference current source, wherein the quantizing circuit comprises:
a combination circuit configured to combine a first signal with an analog feedback signal to produce a delta signal;
an integrator coupled to the combination circuit, wherein the integrator is configured to receive and integrate the delta signal to produce a sigma signal;
an analog-to-digital converter coupled to the integrator, wherein the analog-to-digital converter is configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal; and
a digital-to-analog convertor coupled to the analog-to-digital converter and the combination circuit, wherein the digital-to-analog converter comprises a switch configured to cooperate with the reference current source to convert the digital output signal into the analog feedback signal.
9. The device of claim 8 , wherein the reference current source comprises a reference current device and a current mirror that operate to generate a reference current based upon a current flowing through the reference current device.
10. The device of claim 8 , wherein the reference current source comprises a reference current device and a cascade current mirror that operate to generate a reference current based upon a current flowing through the reference current device.
11. The device of claim 8 , wherein the reference current source is configured to generate a reference current based in part upon a voltage level of a voltage source and a second voltage level of the reference signal.
12. The device of claim 8 , wherein the reference current source comprises a capacitor coupled to a transistor, wherein the capacitor is configured to discharge through the transistor based upon a clock signal received at the transistor to generate a reference current.
13. The device of claim 8 , wherein the data location comprises a flash memory, a phase change memory, a magnetoresistive memory, or a photo-diode.
14. The device of claim 8 , wherein the quantizing circuit comprises a digital filter coupled to analog-to-digital converter to receive the digital output signal.
15. The device of claim 14 , wherein the digital filter is configured to remove high-frequency noise from the digital output signal and at least a second digital output signal received from the analog-to-digital converter.
16. A device, comprising:
a quantizing circuit, comprising:
a combination circuit configured to combine a first signal with an analog feedback signal to produce a delta signal;
an integrator coupled to the combination circuit, wherein the integrator is configured to receive and integrate the delta signal to produce a sigma signal;
an analog-to-digital converter coupled to the integrator, wherein the analog-to-digital converter is configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal; and
a digital-to-analog convertor coupled to the analog-to-digital converter and the combination circuit, wherein the digital-to-analog converter comprises a switch configured to cooperate with a reference current source to convert the digital output signal into the analog feedback signal.
17. The device of claim 16 , wherein the switch is configured to cooperate with the reference current source by routing a reference current generated by the reference current source to ground or to a bit line based upon the digital output signal.
18. The device of claim 16 , wherein the switch is configured to cooperate with the reference current source by utilizing a capacitor of the switch to transmit a first current to a bit line as the reference current source transmits a reference current to the bit line.
19. The device of claim 16 , wherein the switch is configured to cooperate with the reference current source by utilizing a capacitor of the switch to deliver supplemental power to the current source, wherein the supplemental power is generated from a reference current of the current source.
20. The device of claim 16 , wherein the quantizing circuit comprises a digital filter coupled to analog-to-digital converter to receive the digital output signal, wherein the digital filter is configured to output a value that is representative of at least an average value of the digital output signal and at least a second digital output signal received from the analog-to-digital converter.