Electrical device including a through-silicon via structure

1. An electrical device, comprising:

a substrate having a first surface and defining a recess in the first surface;

an active circuit layer; and

a via disposed in the recess, the via comprising:

an insulation layer disposed on the first surface of the substrate and extending at least to a sidewall of the recess;

a first conductive layer disposed adjacent to the insulation layer and extending over at least a portion of the first surface of the substrate, the first conductive layer being in direct contact with the active circuit layer;

a second conductive layer disposed adjacent to the first conductive layer and extending over at least a portion of the first surface of the substrate, the second conductive layer having a negative coefficient of thermal expansion (CTE); and

a stress adjusting layer disposed on and in contact with the first surface of the substrate, and wherein a CTE of the stress adjusting layer is negative.

2. The electrical device according to claim 1 , wherein the substrate has a second surface opposite to the first surface and the active circuit layer is disposed on the second surface.

3. The electrical device according to claim 2 , wherein the active circuit layer is electrically connected to the first conductive layer.

4. The electrical device according to claim 1 , wherein the second conductive layer and the stress adjusting layer comprise a same material.

5. The electrical device according to claim 4 , wherein the second conductive layer comprises graphene.

6. The electrical device according to claim 5 , wherein the first conductive layer comprises copper (Cu).

7. The electrical device according to claim 1 , wherein the substrate comprises a semiconductor material.

8. An electrical device, comprising:

a substrate having a first surface that defines at least a portion of a recess, and a second surface opposite to the first surface;

an active circuit layer disposed on the second surface of the substrate; and

a via disposed in the recess, the via comprising:

a first insulation layer disposed adjacent to a sidewall of the recess;

a first conductive layer disposed adjacent to the first insulation layer, wherein a coefficient of thermal expansion (CTE) of the first conductive layer is positive, and the first conductive layer is in direct contact with the active circuit layer;

a second conductive layer disposed adjacent to the first conductive layer, and wherein a CTE of the second conductive layer is negative,

a second insulation layer disposed adjacent to the second conductive layer, wherein a CTE of the second insulation layer is positive and wherein the second conductive layer surrounds the second insulation layer; and

a stress adjusting layer disposed on and in contact with the first surface of the substrate, and wherein a CTE of the stress adjusting layer is negative.

9. The electrical device according to claim 8 , wherein the active circuit layer is electrically connected to the first conductive layer.

10. The electrical device according to claim 8 , wherein the second conductive layer and the stress adjusting layer comprise a same material.

11. The electrical device according to claim 10 , wherein the second conductive layer comprises graphene.

12. The electrical device according to claim 11 , wherein the first conductive layer comprises Cu.

13. The electrical device according to claim 8 , wherein the substrate comprises a semiconductor material.

14. An electrical device, comprising:

a substrate having a first surface that defines at least a portion of a recess, and a second surface opposite to the first surface;

an active circuit layer disposed on the second surface; and

a via disposed in the recess, the via comprising:

an insulation ring disposed on the first surface and adjacent to a sidewall of the recess;

a first conductive cup disposed in the insulation ring, the first conductive cup being in direct contact with the active circuit layer;

a second conductive cup disposed in the first conductive cup, wherein a coefficient of thermal expansion (CTE) of the second conductive cup is negative; and

an insulation layer disposed in the second conductive cup; and

a stress adjusting layer disposed on and in contact with the first surface of the substrate, and wherein a CTE of the stress adjusting layer is negative.

15. The electrical device according to claim 14 , wherein a CTE of the insulation layer is positive, and a CTE of the first conductive cup is positive.

16. The electrical device according to claim 14 , wherein the second conductive cup extends over at least a portion of the first surface of the substrate.

17. The electrical device according to claim 14 , wherein the second conductive cup and the stress adjusting layer comprise a same material.

18. The electrical device according to claim 17 , wherein the second conductive cup comprises graphene.

19. The electrical device according to claim 18 , wherein the first conductive cup comprises Cu.

20. The electrical device according to claim 14 , wherein the substrate comprises a semiconductor material.

21. An electrical device, comprising:

a substrate having a first surface and defining a through hole having a sidewall;

an active circuit layer;

a via disposed in the through hole and comprising:

an insulation ring disposed on the first surface of the substrate and adjacent to the sidewall of the through hole; and

one or more conductive portions including a first conductive cup disposed in the insulation ring, the first conductive cup being in direct contact with the active circuit layer; and

a patterned conductive layer having a negative coefficient of thermal expansion (CTE) disposed on the first surface of the substrate,

wherein the patterned conductive layer is electrically insulated from the conductive portions of the via.