Semiconductor structure and manufacturing method thereof
View Patent ↗A semiconductor structure includes a semiconductor substrate, n-type source and drain stressors, and a gate stack. The semiconductor substrate has source and drain recesses therein. The n-type source and drain stressors are respectively present in the source and drain recesses. At least one of the n-type source and drain stressors has a hydrogen terminated surface. A gate stack is present on the semiconductor substrate and between the n-type source and drain stressors.
1. A method for manufacturing a semiconductor structure, the method comprising:
forming at least one gate stack on a semiconductor substrate;
forming at least one recess in the semiconductor substrate;
epitaxially forming at least one stressor in the at least one recess in a process chamber;
heat treating the at least one stressor in an atmosphere comprising a hydrogen-containing gas;
prior to heat treating the at least one stressor, purging the process chamber at a temperature lower than a dissociation temperature of H 2 to remove residual gases in the process chamber; and
removing an outgassing gas released from the at least one stressor.
2. The method of claim 1 , wherein the heat treating is performed at a temperature higher than the dissociation temperature of H 2 .
3. The method of claim 1 , wherein the heat treating comprises:
thermally dissociating at least a part of the hydrogen-containing gas into at least one hydrogen radical; and
terminating at least one dangling bond on a surface of the at least one stressor using the at least one hydrogen radical.
4. The method of claim 1 , further comprising:
transferring the semiconductor substrate to a load lock chamber after the heat treating, wherein the outgassing gas released from the at least one stressor is removed from the load lock chamber.
5. The method of claim 1 , further comprising:
cooling down the at least one stressor in a cool down chamber after the heat treating, wherein the outgassing gas released from the at least one stressor is removed from the cool down chamber.
6. The method of claim 1 , further comprising:
epitaxially forming the at least one stressor at a first temperature from about 550° C. to about 700° C.; and
heat treating the at least one stressor at a second temperature greater than the first temperature.
7. A method for manufacturing a semiconductor structure, the method comprising:
forming at least one gate stack on a semiconductor substrate;
forming at least one recess in the semiconductor substrate;
forming at least one epitaxial layer in the at least one recess at a first temperature in a process chamber, wherein the at least one epitaxial layer has at least one dangling bond on its surface;
terminating the at least one dangling bond at a second temperature greater than the first temperature; and
prior to terminating the at least one dangling bond, purging the process chamber with a hydrogen-containing gas to remove residual gases in the process chamber.
8. The method of claim 7 , further comprising:
transferring the semiconductor substrate to a load lock chamber after the terminating; and
purging the load lock chamber with an inert gas.
9. The method of claim 8 , wherein the purging is performed periodically.
10. The method of claim 7 , wherein the first temperature is in a range from about 550° C. to about 700° C.
11. A method for manufacturing a semiconductor structure, the method comprising:
forming at least one gate stack on a semiconductor substrate;
forming at least one recess in the semiconductor substrate;
forming at least one epitaxial layer in the at least one recess at a first temperature from about 550° C. to about 700° C.; and
after forming the at least one epitaxial layer in the at least one recess at the first temperature, heat treating the at least one epitaxial layer at a second temperature greater than the first temperature.
12. The method of claim 11 , further comprising:
purging a process chamber where the forming the at least one epitaxial layer is performed with a hydrogen-containing gas.
13. The method of claim 12 , wherein the purging the process chamber is performed at a temperature which is lower than a dissociation temperature of the hydrogen-containing gas.
14. The method of claim 12 , further comprising:
hydrogen terminating at least a top surface of the at least one epitaxial layer after the purging.
15. The method of claim 11 , wherein the second temperature is in a range from about 700° C. to about 900° C.
16. The method of claim 11 , further comprising:
after forming the at least one epitaxial layer in the at least one recess at the first temperature, purging a process chamber at the first temperature.
17. The method of claim 11 , further comprising:
cooling down the semiconductor substrate;
after cooling down the semiconductor substrate, transferring the semiconductor substrate to a load lock chamber; and
periodically purging the load lock chamber.
18. The method of claim 11 , wherein forming the at least one epitaxial layer includes:
depositing a first silicon-containing layer in the at least one recess;
removing a portion of the first silicon-containing layer;
depositing a second silicon-containing layer on the remaining first silicon-containing layer; and
removing a portion of the second silicon-containing layer; and
filling the at least one recess with a third silicon-containing layer.
19. The method of claim 18 , wherein heat treating the at least one epitaxial layer includes terminating dangling bonds on a top surface of the third silicon-containing layer at the second temperature.
20. The method of claim 18 , wherein depositing the first and second silicon-containing layers is such that the first and second silicon-containing layers are formed conformally in the at least one recess and filling the at least one recess with the third silicon-containing layer is such that a top surface of the third silicon-containing layer is above a top surface of the semiconductor substrate.