IP Library › Granted Patent US 10,665,749
Granted Patent B2
US 10,665,749 · App. 16/340,108 · Granted May 26, 2020

Manufacturing method of quantum dot structure

Inventors: Ziyang Zhang (Suzhou, CN); Rong Huang (Suzhou, CN); Yuanqing Huang (Suzhou, CN)
Assignee: QINGDAO YICHENLEISHUO TECHNOLOGY CO., LTD
H01L33/06H01L33/0062H01L33/0095H01L33/30H01L33/44H01S5/0206H01S5/028H01S5/343H01S5/3412H01L2933/0025
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Quick Facts
Patent No.
US 10,665,749
App. No.
16/340,108
Granted
May 26, 2020
Kind
B2
Abstract

The present disclosure discloses a manufacturing method of a quantum dot structure including: providing a quantum dot film layer on a substrate; providing a first protection film on the quantum dot film layer; providing a patterned array on the first protection film; providing a second protection film on the first protection film and the patterned array to obtain an intermediate body; and performing an annealing process on the intermediate body to obtain the quantum dot structure on the substrate.

Claims (29)

1. A manufacturing method of a quantum dot structure, comprising:

providing a quantum dot film layer on a substrate;

providing a first protection film on the quantum dot film layer;

providing a patterned array on the first protection film;

providing a second protection film on the first protection film and the patterned array to obtain an intermediate body; and

performing an annealing process on the intermediate body to obtain the quantum dot structure on the substrate.

2. The manufacturing method of claim 1 , wherein a material of the patterned array is selected from any one of TiO 2 , Al, HfO 2 , Si 3 N 4 and SrTiO 3 ; and a thickness of the patterned array is 40 nm˜300 nm, and a length and/or width of the patterned array is 10 nm˜10 μm.

3. The manufacturing method of claim 1 , wherein materials of the first protection film and the second protection film each are SiO 2 ; and a thickness of the first protection film is 5 nm˜50 nm, and a thickness of the second protection film is 50 nm˜300 nm.

4. The manufacturing method of claim 1 , wherein an annealing temperature for performing an annealing process on the intermediate body is 550° C.˜1000° C., and annealing time is 30 s˜10 min.

5. The manufacturing method of claim 1 , wherein a material of the quantum dot film layer is selected from any one of InAs, InGaAs, InGaAlAs, InSb, GaSb and InP;

a growing temperature of the quantum dot film layer is 300° C.˜550° C.; a thickness of the quantum dot film layer is 1.4 ML˜10 ML; and a density of a quantum dot in the quantum dot film layer is 10 8 cm −2 ˜10 11 cm −2 .

6. The manufacturing method of claim 1 , wherein the providing the patterned array on the first protection film specifically comprises:

providing a precursor film layer on the first protection film;

performing a patterning process on the precursor film layer by adopting a laser direct writing process, the precursor film layer becoming the patterned array and a precursor residual film surrounding around the patterned array; and

peeling off the precursor residual film to form the patterned array on the first protection film.

7. The manufacturing method of claim 6 , wherein a material of the precursor film layer is Ti; a thickness of the precursor film layer is 40 nm-300 nm; and a length and/or width of the patterned array is 100 nm˜500 nm.

8. The manufacturing method of claim 1 , wherein the providing the patterned array on the first protection film specifically comprises:

providing a photoresist layer on the first protection film;

performing a patterning process on the photoresist layer by adopting a photolithography process or an electron beam photolithography process, to form a concave hole matching with a shape of the patterned array;

depositing a patterned film layer in the concave hole; and

peeling off the photoresist layer to form the patterned array on the first protection film.

9. The manufacturing method of claim 8 , wherein:

a material of the patterned film layer is selected from any one of TiO 2 , Al, HfO 2 , Si 3 N 4 and SrTiO 3 ;

a thickness of the patterned film layer is 40 nm˜300 nm;

a length and/or a width of the patterned array is 200 nm˜10 μm when performing the patterning process on the photoresist layer by adopting the photolithography process; and

a length and/or a width of the patterned array is 10 nm˜200 nm when performing the patterning process on the photoresist layer by adopting the electron beam photolithography process.

10. The manufacturing method of claim 1 , wherein a material of the substrate is selected from any one of GaAs, GaSb and InP.

11. The manufacturing method of claim 2 , wherein an annealing temperature for performing an annealing process on the intermediate body is 550° C.˜1000° C., and annealing time is 30 s˜10 min.

12. The manufacturing method of claim 3 , wherein an annealing temperature for performing an annealing process on the intermediate body is 550° C.˜1000° C., and annealing time is 30 s˜10 min.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2019
From: SUZHOU INSTITUTE OF NANO-TECH AND NANO-BIONICS(SINANO), CHINESE ACADEMY OF SCIENCES
To: QINGDAO YICHENLEISHUO TECHNOLOGY CO., LTD
Reel/Frame 051025/0518 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2019
From: ZHANG, ZIYANG; HUANG, RONG; HUANG, YUANQING
To: SUZHOU INSTITUTE OF NANO-TECH AND NANO-BIONICS(SINANO), CHINESE ACADEMY OF SCIENCES
Reel/Frame 048849/0349 →
Priority Claims (1)
CN 2016 1 0876764 · Oct 8, 2016 · national
Continuity (1)
Related Publication 20200028026A1 · Jan 23, 2020