IP Library › Granted Patent US 10,670,935
Granted Patent B2
US 10,670,935 · App. 15/246,252 · Granted Jun 2, 2020

Display device

Inventors: Chung-Wen Yen (Miao-Li County, TW); Yu-Tsung Liu (Miao-Li County, TW); Chao-Hsiang Wang (Miao-Li County, TW); Te-Yu Lee (Miao-Li County, TW)
Assignee: INNOLUX CORPORATION
G02F1/1368G02F1/136286H01L27/124H01L27/1222G02F1/133345G02F2001/13606
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Quick Facts
Patent No.
US 10,670,935
App. No.
15/246,252
Granted
Jun 2, 2020
Kind
B2
Abstract

The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.

Claims (33)

1. A display device, comprising:

a first substrate;

a second substrate;

a display media layer disposed between the first substrate and the second substrate;

an active layer disposed on the first substrate;

a first insulation layer disposed on the active layer;

a first electrode layer disposed on the first insulation layer, wherein the first electrode layer includes a gate electrode line extending along a first direction;

a second insulation layer disposed on the first electrode layer; and

a second electrode layer disposed on the second insulation layer, wherein the second electrode layer includes a data line extending along a second direction and a conductive pattern, the data line and the conductive pattern are in electrical contact with the active layer through a first contact via and a second contact via respectively, and the conductive pattern has a non-linear side adjacent to the first electrode layer;

wherein the gate electrode line includes a first gate electrode portion and a second gate electrode portion connecting the first gate electrode portion, and the first gate electrode portion overlaps the active layer,

wherein there is a first minimum distance D 2 along the second direction between a projection of the first gate electrode portion onto the first substrate and a projection of the conductive pattern onto the first substrate, there is a second minimum distance D 3 along the second direction between a projection of the second gate electrode portion onto the first substrate and the projection of the conductive pattern onto the first substrate, and a ratio of the second minimum distance D 3 to the first minimum distance D 2 is between 0.50 and 0.95.

2. The display device as claimed in claim 1 , wherein the first minimum distance D 2 is between 1.0 μm and 5.0 μm.

3. The display device as claimed in claim 1 , wherein the second minimum distance D 3 is between 0.5 μm and 4.5 μm.

4. The display device as claimed in claim 1 , wherein the ratio of the second minimum distance D 3 to the first minimum distance D 2 is between 0.80 and 0.90.

5. The display device as claimed in claim 1 , further comprising:

a third insulation layer disposed on the second electrode layer; and

a pixel electrode layer disposed on the third insulation layer and connected to the conductive pattern via a third contact via, wherein a projection of the third contact via onto the first substrate has a first maximum width W 1 in the first direction X and a second maximum width W 2 in the first direction Y, and the first maximum width W 1 is not equal to the second maximum width W 2 .

6. The display device as claimed in claim 5 , wherein the first maximum width W 1 is greater than the second maximum width W 2 , and a ratio of the second maximum width W 2 to the first maximum width W 1 is between 0.5 and 0.8.

7. The display device as claimed in claim 5 , wherein the first maximum width W 1 is less than the second maximum width W 2 , and a ratio of the first maximum width W 1 to the second maximum width W 2 is between 0.5 and 0.8.

8. A thin film transistor substrate, comprising:

a first substrate;

an active layer disposed on the first substrate;

a first insulation layer disposed on the active layer;

a first electrode layer disposed on the first insulation layer, wherein the first electrode layer includes a gate electrode line extending along a first direction;

a second insulation layer disposed on the first electrode layer; and

a second electrode layer disposed on the second insulation layer, wherein the second electrode layer includes a data line extending along a second direction and a conductive pattern, the data line and the conductive pattern are in electrical contact with the active layer through a first contact via and a second contact via respectively, and the conductive pattern has a non-linear side adjacent to the first electrode layer;

wherein the gate electrode line includes a first gate electrode portion and a second gate electrode portion connecting the first gate electrode portion, and the first gate electrode portion overlaps the active layer,

wherein there is a first minimum distance D 2 along the second direction between a projection of the first gate electrode portion onto the first substrate and a projection of the conductive pattern onto the first substrate, there is a second minimum distance D 3 along the second direction between a projection of the second gate electrode portion onto the first substrate and the projection of the conductive pattern onto the first substrate, and a ratio of the second minimum distance D 3 to the first minimum distance D 2 is between 0.50 and 0.95.

9. The thin film transistor substrate as claimed in claim 8 , wherein the first minimum distance D 2 is between 1.0 μm and 5.0 μm.

10. The thin film transistor substrate as claimed in claim 8 , wherein the second minimum distance D 3 is between 0.5 μm and 4.5 μm.

11. The thin film transistor substrate as claimed in claim 8 , further comprising:

a third insulation layer disposed on the second electrode layer; and

a pixel electrode layer disposed on the third insulation layer and connected to the conductive pattern via a third contact via, wherein a projection of the third contact via onto the first substrate has a first maximum width W 1 in the first direction X and a second maximum width W 2 in the first direction Y, and the first maximum width W 1 is not equal to the second maximum width W 2 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: YEN, CHUNG-WEN; LIU, YU-TSUNG; WANG, CHAO-HSIANG; LEE, TE-YU
To: INNOLUX CORPORATION
Reel/Frame 039531/0009 →
Priority Claims (1)
TW 104128305 A · Aug 28, 2015 · national
Continuity (1)
Related Publication 20170059908A1 · Mar 2, 2017