IP Library › Granted Patent US 10,671,148
Granted Patent B2
US 10,671,148 · App. 15/850,261 · Granted Jun 2, 2020

Multi-node system low power management

Inventors: Benjamin Tsien (Fremont, CA); Bryan P. Broussard (Austin, TX); Vydhyanathan Kalyanasundharam (San Jose, CA)
Assignee: Advanced Micro Devices, Inc.
G06F1/3296G06F1/3275G06F12/0833G06F13/26
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Quick Facts
Patent No.
US 10,671,148
App. No.
15/850,261
Granted
Jun 2, 2020
Kind
B2
Abstract

Systems, apparatuses, and methods for performing efficient power management for a multi-node computing system are disclosed. A computing system including multiple nodes utilizes a non-uniform memory access (NUMA) architecture. A first node receives a broadcast probe from a second node. The first node spoofs a miss response for a powered down third node, which prevents the third node from waking up to respond to the broadcast probe. Prior to powering down, the third node flushed its probe filter and caches, and updated its system memory with the received dirty cache lines. The computing system includes a master node for storing interrupt priorities of the multiple cores in the computing system for arbitrated interrupts. The cores store indications of fixed interrupt identifiers for each core in the computing system. Arbitrated and fixed interrupts are handled by cores with point-to-point unicast messages, rather than broadcast messages.

Claims (66)

1. A computing system comprising:

a plurality of nodes, each comprising:

one or more clients configured to process applications;

a plurality of links coupled to other nodes of the plurality of nodes; and

a power controller; and

wherein in response to receiving a broadcast probe from a first node of the plurality of nodes, a second node of the plurality of nodes is configured to:

generate a miss response for a third node of the plurality of nodes directly connected to the second node responsive to determining the third node is powered down; and

send the miss response to the first node.

2. The computing system as recited in claim 1 , wherein in response to generating a broadcast probe, the first node of the plurality of nodes is configured to:

generate a miss response for a fourth node of the plurality of nodes directly connected to the first node responsive to determining the fourth node is powered down.

3. The computing system as recited in claim 1 , wherein the first node is configured to:

maintain a probe filter as memory requests are serviced; and

in response to determining each client of the one or more clients is idle:

invalidate each entry in the probe filter; and

update a system memory connected to the first node with dirty cache lines received as a result of invalidating entries in the probe filter; and

power down the plurality of links and the one or more clients of the first node.

4. The computing system as recited in claim 1 , wherein at least one client of the one or more clients comprises a plurality of cores, and wherein a master node of the plurality of nodes is configured to store interrupt priorities of the plurality of cores in the plurality of nodes for arbitrated interrupts.

5. The computing system as recited in claim 4 , wherein in response to detecting an arbitrated interrupt, the first node is configured to:

send a request to the master node to identify a given core with a lowest priority and a given node comprising the given core; and

send a request to the given node to handle the arbitrated interrupt with the given core based on a response from the master node identifying the given core and the given node.

6. The computing system as recited in claim 4 , wherein in response to determining priorities of cores for arbitrated interrupts are updated in the first node, the first node is configured to send the updated priorities to the master node for updating priorities of cores for arbitrated interrupts stored on the master node.

7. The computing system as recited in claim 1 , wherein at least one client of the one or more clients comprises a plurality of cores, and wherein at least the first node is configured to store an indication of a fixed interrupt identifier (ID) for each core of the plurality of cores.

8. The computing system as recited in claim 7 , wherein in response to detecting a fixed interrupt, the first node is configured to:

identify a given node comprising a given core with a fixed interrupt ID that matches a fixed interrupt ID of the detected fixed interrupt; and

send a request to the given node to handle the fixed interrupt with the given core.

9. A method, comprising:

processing applications by a plurality of nodes, each comprising:

one or more clients configured to process the applications;

a plurality of links coupled to other nodes of a plurality of nodes; and

a power controller; and

in response to receiving a broadcast probe from a first node of the plurality of nodes, a second node of the plurality of nodes is configured to:

generating, by a second node of the plurality of nodes, a miss response for a third node of the plurality of nodes directly connected to the second node responsive to determining the third node is powered down; and

sending, by the second node, the miss response to the first node.

10. The method as recited in claim 9 , wherein in response to generating a broadcast probe:

generating, by the first node, a miss response for a fourth node of the plurality of nodes directly connected to the first node responsive to determining the fourth node is powered down.

11. The method as recited in claim 9 , further comprising:

maintaining, by the first node, a probe filter as memory requests are serviced; and

in response to determining each client of the one or more clients in the first node is idle:

invalidating each entry in the probe filter; and

updating a system memory connected to the first node with dirty cache lines received as a result of invalidating entries in the probe filter; and

powering down the plurality of links and the one or more clients of the first node.

12. The method as recited in claim 9 , wherein at least one client of the one or more clients comprises a plurality of cores, and the method further comprises storing, by a master node of the plurality of nodes, interrupt priorities of the plurality of cores in the plurality of nodes for arbitrated interrupts.

13. The method as recited in claim 12 , wherein in response to detecting an arbitrated interrupt, the method further comprises:

sending, by the first node, a request to the master node to identify a given core with a lowest priority and a given node comprising the given core; and

sending, by the first node, a request to the given node to handle the arbitrated interrupt with the given core based on a response from the master node identifying the given core and the given node.

14. The method as recited in claim 13 , wherein in response to determining priorities of cores for arbitrated interrupts are updated in the first node, the method further comprises sending, by the first node, the updated priorities to the master node for updating priorities of cores for arbitrated interrupts stored on the master node.

15. The method as recited in claim 9 , wherein at least one client of the one or more clients comprises a plurality of cores, and the method further comprises storing, by at least the first node, an indication of a fixed interrupt identifier (ID) for each core of the plurality of cores.

16. The method as recited in claim 15 , wherein in response to detecting a fixed interrupt, the method further comprises:

identifying, by the first node, a given node comprising a given core with a fixed interrupt ID that matches a fixed interrupt ID of the detected fixed interrupt; and

sending, by the first node, a request to the given node to handle the fixed interrupt with the given core.

17. A processing node comprising:

one or more clients configured to process applications;

a plurality of links coupled to other nodes of a plurality of nodes; and

control logic; and

wherein in response to receiving a broadcast probe from a first node of a plurality of nodes, the control logic is configured to:

generate a miss response for a second node of the plurality of nodes directly connected to the processing node responsive to determining the second node is powered down; and

send the miss response to the first node.

18. The processing node as recited in claim 17 , wherein in response to generating a broadcast probe, the control logic is configured to:

generate a miss response for a third node of the plurality of nodes directly connected to the processing node responsive to determining the third node is powered down.

19. The processing node as recited in claim 17 , wherein the control logic is configured to:

maintain a probe filter as memory requests are serviced; and

in response to determining each client of the one or more clients is idle:

invalidate each entry in the probe filter; and

update a system memory connected to the processing node with dirty cache lines received as a result of invalidating entries in the probe filter; and

power down the plurality of links and the one or more clients.

20. The processing node as recited in claim 17 , wherein at least one client of the one or more clients comprises a plurality of cores, and wherein the processing node is a master node of the plurality of nodes configured to store interrupt priorities of a plurality of cores in the plurality of nodes for arbitrated interrupts.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: TSIEN, BENJAMIN; BROUSSARD, BRYAN P.; KALYANASUNDHARAM, VYDHYANATHAN
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 044462/0028 →
Continuity (1)
Related Publication 20190196574A1 · Jun 27, 2019
Cited By (2)
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