IP Library › Granted Patent US 10,680,088
Granted Patent B2
US 10,680,088 · App. 16/201,960 · Granted Jun 9, 2020

Tunnel field effect transistor having anisotropic effective mass channel

Inventors: Hesameddin Ilatikhameneh (Waukegan, IL); Tarek Ameen Beshari (West Lafayette, IN); Bozidar Novakovic (West Lafayette, IN); Gerhard Klimeck (West Lafayette, IN); Rajib Rahman (West Lafayette, IN)
Assignee: Purdue Research Foundation
H01L29/7391H01L29/0834H01L29/0847H01L29/1025H01L29/1033H01L29/267H01L29/42312
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Quick Facts
Patent No.
US 10,680,088
App. No.
16/201,960
Granted
Jun 9, 2020
Kind
B2
Abstract

A tunnel field effect transistor (TFET) device includes a substrate, heavily doped source and drain regions disposed at opposite ends of a channel region forming a PiN or NiP structure, the channel region including a first substantially parallelogram portion having a first length defined along a longitudinal axis extending from the source region to the drain region and a second substantially parallelogram portion having a second length defined along the longitudinal axis larger than the first length, the TFET device having an effective channel length that is an average of the first and second lengths. The channel region includes a channel material with a first effective mass along a longitudinal axis extending from the source region to the drain region and a second effective mass along a lateral axis perpendicular to the longitudinal axis, the first effective mass being greater than the second effective mass.

Claims (10)

1. A tunnel field effect transistor (TFET) device, comprising:

a substrate;

heavily doped source and drain regions disposed at opposite ends of the substrate separated by a channel region, where the channel region is intrinsic or lightly doped with doping of less than 10 18 /cm 3 and the source and drain regions doped with doping of between about 10 18 /cm 3 to about 10 21 /cm 3 , collectively forming a structure wherein the structure is PiN or NiP; and

a source and drain terminal coupled to the source and drain regions, respectively,

the channel region comprising a channel material having a first effective mass along a longitudinal axis extending from the source region to the drain region and a second effective mass along a lateral axis perpendicular to the longitudinal axis, the channel region is L-shaped comprising a first rectangular portion having a first length defined along the longitudinal axis and a second rectangular portion connected to the first rectangular portion having a second length defined along the longitudinal axis and larger than the first length, the TFET device having an effective channel length defined along the longitudinal axis that is an average of the first and second lengths, wherein a ratio of the first effective mass to the second effective mass is between 1 and 50.

2. The TFET device of claim 1 , the channel region comprising one or more layers of i) 2-dimensional inherently anisotropic effective mass material made from phosphorene, titanium trisulfide, or any combination thereof; ii) 2-dimensional inherently isotropic effective mass material made from transition metal dichalcogenide including molybdenum disulfide, tungsten disulfide, molybdenum diselenide, tungsten diselenide, molybdenum ditelluride, or any combination thereof; or iii) 3-dimensional bulk material made from Si, germanium, gallium arsenide (GaAs), an alloy of silicon and germanium, indium phosphide, or any combination thereof, wherein the 2-dimensional inherently isotropic effective mass material and the 3-dimensional bulk material are formed to induce the first effective mass and the second effective mass.

3. The TFET device of claim 1 , the effective channel length having a value of about 2 nm to about 20 nm.

4. The TFET device of claim 1 , a difference (dL) between the second length and the first length having a value of about 1 nm to about 10 nm.

5. The TFET device of claim 1 , the TFET having a ratio of drain to source current (I DS ) in an on state to I DS in an off state of between about 10 4 to about 10 7 for channel lengths from 2 nm to 8 nm.

6. The TFET device of claim 5 , wherein the TFET IDS current in the on state is between 1 μA/μm to about 50 μA/μm for a supply voltage applied to the drain region of about 0.2 V when a difference (dL) between the second length and the first length is about 3 nm, and IDS current in the off state is about 10 −04 ρA/μm.

Continuity (3)
Continuation 15479247 · Apr 4, 2017
Provisional Application 62317835 · Apr 4, 2016
Related Publication 20200027974A1 · Jan 23, 2020