Optoelectronics integration using semiconductor on insulator substrate
A III-V optoelectronic light emitting device is epitaxially formed on a semiconductor on insulator substrate over a buried waveguide core. The device is optically coupled to the underlying waveguide core. A MOSFET device is formed on a semiconductor substrate beneath the insulator that contains the waveguide core.
1. A method of fabricating an optoelectronic device, comprising:
obtaining a first structure including:
a semiconductor substrate including a first region and a second region, the second region being laterally displaced from the first region,
a bottom dielectric layer on the semiconductor substrate, and
a buried waveguide core within the bottom dielectric layer and directly above the first region of the semiconductor substrate;
forming a semiconductor layer on the bottom dielectric layer;
forming a recess within the bottom dielectric layer over the second region of the semiconductor substrate;
forming a field-effect transistor in the second region of the semiconductor substrate;
filling the recess with dielectric material;
forming first electrical conductors within the dielectric material, the first electrical conductors being electrically connected to the field-effect transistor;
patterning the semiconductor layer to form a semiconductor device layer over the first region of the semiconductor substrate;
epitaxially growing a plurality of III-V semiconductor layers on the semiconductor device layer over the first region of the semiconductor substrate, the III-V semiconductor layers comprising an optoelectronic structure configured for light emission;
patterning the optoelectronic structure;
forming a top dielectric layer over the bottom dielectric layer and the dielectric material filling the recess, the top dielectric layer encapsulating the optoelectronic structure, and
forming second electrical conductors within the top dielectric layer, the second electrical conductors being electrically connected to the first electrical conductors and the optoelectronic structure.
2. The method of claim 1 , wherein the buried waveguide core is a dielectric waveguide core extending directly beneath the optoelectronic structure.
3. The method of claim 2 , wherein the buried waveguide core consists essentially of silicon nitride.
4. The method of claim 3 , wherein the bottom dielectric layer consists essentially of silicon dioxide and the semiconductor substrate consists essentially of silicon.
5. The method of claim 4 , wherein the semiconductor device layer consists essentially of germanium.
6. The method of claim 5 , wherein forming the semiconductor layer on the bottom dielectric layer includes transferring an essentially monocrystalline germanium layer from a second semiconductor substrate to a top surface of the bottom dielectric layer.
7. The method of claim 6 , further including forming the second semiconductor substrate by:
epitaxially growing a graded silicon germanium layer on a silicon base, the silicon germanium layer having an increasing germanium content as the silicon germanium layer is grown, and
epitaxially growing the essentially monocrystalline germanium layer on the silicon germanium layer.
8. The method of claim 1 , wherein the semiconductor device layer consists essentially of germanium.
9. The method of claim 8 , wherein patterning the semiconductor layer further includes forming a semiconductor device layer having tapered end portions.
10. The method of claim 1 , wherein patterning the semiconductor layer further includes forming the semiconductor device layer with a longitudinal axis extending in the same direction as a longitudinal axis of the waveguide core.