Device structure for forming semiconductor device having angled contacts
A memory device may include an active device region, disposed at least partially in a first level. The memory device may include a storage capacitor, disposed at least partially in a second level, above the first level, wherein the first level and the second level are parallel to a substrate plane. The memory device may also include a contact via, the contact via extending between the storage capacitor and the active device region, and defining a non-zero angle of inclination with respect to a perpendicular to the substrate plane.
1. A memory device, comprising:
an active device region, comprising a first active area row and a second active area row, disposed at least partially in a first level;
a first storage capacitor, arranged in a capacitor row, and a second storage capacitor, arranged in the capacitor row, the first storage capacitor and the second storage capacitor being disposed at least partially in a second level, above the first level, wherein the first level and the second level are parallel to a substrate plane;
a first contact via, the first contact via extending between the first storage capacitor and the first active area row, and defining a first non-zero angle of inclination with respect to a perpendicular to the substrate plane; and
a second contact via, the second contact via extending between the second storage capacitor and the second active area row, and defining a second non-zero angle of inclination with respect to the perpendicular to the substrate plane,
wherein the first contact via is angled in a first direction, and
wherein the second contact via is angled in a second direction, different from the first direction.
2. The memory device of claim 1 , wherein the first storage capacitor forms incomplete overlap with the active device region within the substrate plane from a plan view perspective.
3. The memory device of claim 1 , wherein the first storage capacitor forms no overlap with the active device region within the substrate plane from a plan view perspective.
4. The memory device of claim 1 , wherein an entirety of a bottom portion of the first contact via overlaps with the active device region.
5. The memory device of claim 1 , wherein an entirety of a top portion of the first contact via overlaps with the first storage capacitor.
6. The memory device of claim 1 , wherein the first non-zero angle of inclination is less than 15 degrees.
7. The memory device of claim 1 , wherein the active device region and the first storage capacitor and the second storage capacitor form a portion of a dynamic random-access memory (DRAM) cell.
8. The memory device of claim 7 , wherein the DRAM cell forms a portion of a DRAM device, wherein the DRAM device comprises a 6F 2 structure.
9. The memory device of claim 1 , wherein the first contact via is disposed at least partially in a third level, the third level extending between the first level and the second level.
10. The memory device of claim 1 , wherein the active device region and the first storage capacitor and the second storage capacitor form a portion of a dynamic random-access memory (DRAM) cell, wherein the first contact via extends through a digit line level of the DRAM cell including a digit line.
11. A device structure, comprising:
a first device arranged in a first device row and a third device, arranged in a second device row, the first device and the third device being disposed in a first device level;
a second device arranged in a third device row and a fourth device arranged in the third device row, the second device and the fourth device being disposed in a second device level, above the first device level;
a first contact via, the first contact via extending between the first device and the second device, and defining a first non-zero angle of inclination with respect to a perpendicular to a substrate plane; and
a second contact via, the second contact via extending between the third device and the fourth device, and defining a second non-zero angle of inclination with respect to the perpendicular to the substrate plane,
wherein the first contact via is angled in a first direction, and
wherein the second contact via is angled in a second direction, different from the first direction.
12. The device structure of claim 11 , wherein the first device does not overlap the second device as viewed in plan view within the substrate plane.