IP Library Granted Patent US 10,700,646
Granted Patent B2
US 10,700,646 · App. 16/249,422 · Granted Jun 30, 2020

pHEMT switch circuits with enhanced linearity performance

Inventors: Fikret Altunkilic (North Andover, MA); Haki Cebi (Orlando, FL); Yu Zhu (Wellesley, MA); Cejun Wei (Burlington, MA); Jerod F. Mason (Bedford, MA)
Assignee: SKYWORKS SOLUTIONS, INC.
H03F1/3205H01L29/778H03F3/193H03F3/1935H03F3/245H03K17/162H03K17/687H03F2200/228H03F2200/294H03F2200/451H03F2200/72
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Quick Facts
Patent No.
US 10,700,646
App. No.
16/249,422
Granted
Jun 30, 2020
Kind
B2
Abstract

pHEMT-based switch circuits, devices including same, and methods of improving the linearity thereof. In one example, an antenna switch module includes a pHEMT switching circuit connected in series between an input signal terminal and a load terminal, the pHEMT switching circuit including at least one pHEMT configured to produce a first harmonic signal at the load terminal responsive to being driven by an input signal of a fundamental frequency received at the input signal terminal, the first harmonic signal having a first phase, and a gate resistance circuit connected to a gate of the at least one pHEMT and having a resistance value selected to produce a second harmonic signal at the load terminal, the second harmonic signal having a second phase opposite to the first phase.

Claims (42)

1. An antenna switch module comprising:

an input signal terminal;

a load terminal;

a pseudomorphic high electron mobility transistor switching circuit connected in series between the input signal terminal and the load terminal, the pseudomorphic high electron mobility transistor switching circuit including at least one pseudomorphic high electron mobility transistor configured to produce a first harmonic signal at the load terminal responsive to being driven by an input signal of a fundamental frequency received at the input signal terminal, the first harmonic signal having a first phase; and

a gate resistance circuit connected to a gate of the at least one pseudomorphic high electron mobility transistor and having a resistance value selected to produce a second harmonic signal at the load terminal, the second harmonic signal having a second phase opposite to the first phase.

2. The antenna switch module of claim 1 wherein the at least one pseudomorphic high electron mobility transistor includes at least one single-gate pseudomorphic high electron mobility transistor.

3. The antenna switch module of claim 1 wherein the at least one pseudomorphic high electron mobility transistor includes at least one triple-gate pseudomorphic high electron mobility transistor.

4. The antenna switch module of claim 1 further comprising an antenna connected to the load terminal.

5. An antenna switch module comprising:

an input signal terminal;

a load terminal;

a pseudomorphic high electron mobility transistor switching circuit connected in series between the input signal terminal and the load terminal, the pseudomorphic high electron mobility transistor switching circuit including at least one pseudomorphic high electron mobility transistor configured to produce a first harmonic signal at the load terminal responsive to being driven by an input signal of a fundamental frequency received at the input signal terminal, the first harmonic signal having a first phase; and

a gate resistance circuit connected to a gate of the at least one pseudomorphic high electron mobility transistor and having a resistance value selected to produce a second harmonic signal at the load terminal, the second harmonic signal having a second phase opposite to the first phase, the gate resistance circuit including at least one variable resistor.

6. The antenna switch module of claim 5 further comprising a controller connected to the gate resistance circuit and configured to tune a resistance of the at least one variable resistor to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, the resistance value being selected such that the second harmonic signal substantially cancels the first harmonic signal at the load terminal.

7. The antenna switch module of claim 6 wherein a net harmonic signal at the load terminal resulting from cancellation of the first harmonic signal by the second harmonic signal has a power level of less than −50 dBm.

8. The antenna switch module of claim 1 wherein the gate resistance circuit includes a plurality of switchable resistors configured to be selectively connected together to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor.

9. The antenna switch module of claim 8 further comprising a controller connected to the gate resistance circuit and configured to provide at least one control signal to actuate switches associated with selected ones of the plurality of switchable resistors to connect together the selected ones of the plurality of switchable resistors to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, the resistance value being selected such that the second harmonic signal substantially cancels the first harmonic signal at the load terminal.

10. The antenna switch module of claim 9 wherein a net harmonic signal at the load terminal resulting from cancellation of the first harmonic signal by the second harmonic signal has a power level of less than −50 dBm.

11. The antenna switch module of claim 1 wherein the gate resistance circuit includes at least one non-linear resistor.

12. The antenna switch module of claim 1 further comprising:

a frequency detector configured to monitor a power level of a net harmonic signal at the load terminal resulting from cancellation of the first harmonic signal by the second harmonic signal and to provide a feedback signal indicating the power level; and

a controller connected to the gate resistance circuit and to the frequency detector, the controller being configured to receive the feedback signal from the frequency detector and to adjust the resistance value based on the feedback signal.

13. A wireless device comprising:

an antenna;

a transmitter configured to generate a transmit signal of a fundamental frequency for transmission by the antenna; and

an antenna switch connected between the antenna and the transmitter, the antenna switch including a pseudomorphic high electron mobility transistor switching circuit connected in series between a signal terminal and the antenna, the pseudomorphic high electron mobility transistor switching circuit including at least one pseudomorphic high electron mobility transistor configured to produce a first harmonic signal at the antenna responsive to being driven by the transmit signal received at the signal terminal from the transmitter, the first harmonic signal having a first phase, and the antenna switch further including a gate resistance circuit connected to a gate of the at least one pseudomorphic high electron mobility transistor and having a resistance value selected to produce a second harmonic signal at the antenna, the second harmonic signal having a second phase opposite to the first phase, the gate resistance circuit including at least one variable resistor.

14. The wireless device of claim 13 further comprising:

a receiver configured to process a received signal received by the antenna; and

filter circuitry including a transmit filter connected between the transmitter and the antenna switch and a receive filter connected between the antenna switch and the receiver.

15. The wireless device of claim 14 further comprising a phase shifter connected between the antenna switch and the filter circuitry.

16. The wireless device of claim 14 further comprising:

a power amplifier connected between the transmitter and the transmit filter, the power amplifier being configured to receive and amplify the transmit signal; and

a low noise amplifier connected between the receive filter and the receiver and configured to receive and amplify the received signal.

17. The wireless device of claim 16 wherein the low noise amplifier includes at least one amplifying pseudomorphic high electron mobility transistor and at least one non-linear shunt resistor connected to the at least one amplifying pseudomorphic high electron mobility transistor.

18. A wireless device comprising:

an antenna;

a transmitter configured to generate a transmit signal of a fundamental frequency for transmission by the antenna;

an antenna switch connected between the antenna and the transmitter, the antenna switch including a pseudomorphic high electron mobility transistor switching circuit connected in series between a signal terminal and the antenna, the pseudomorphic high electron mobility transistor switching circuit including at least one pseudomorphic high electron mobility transistor configured to produce a first harmonic signal at the antenna responsive to being driven by the transmit signal received at the signal terminal from the transmitter, the first harmonic signal having a first phase, and the antenna switch further including a gate resistance circuit connected to a gate of the at least one pseudomorphic high electron mobility transistor and having a resistance value selected to produce a second harmonic signal at the antenna, the second harmonic signal having a second phase opposite to the first phase;

a frequency detector configured to monitor a power level of a net harmonic signal at the antenna resulting from cancellation of the first harmonic signal by the second harmonic signal and to provide a feedback signal indicating the power level; and

a controller connected to the gate resistance circuit and to the frequency detector, the controller being configured to receive the feedback signal from the frequency detector and to adjust the resistance value based on the feedback signal.

19. The wireless device of claim 18 wherein the gate resistance circuit includes at least one variable resistor, and wherein the controller is configured to tune a resistance of the at least one variable resistor to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, the resistance value being selected such that the second harmonic signal substantially cancels the first harmonic signal at the load terminal.

20. The wireless device of claim 18 wherein the gate resistance circuit includes a plurality of switchable resistors configured to be selectively connected together to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, and wherein the controller is configured to provide at least one control signal to actuate switches associated with selected ones of the plurality of switchable resistors to connect together the selected ones of the plurality of switchable resistors to provide the resistance value at the gate of the at least one pseudomorphic high electron mobility transistor, the resistance value being selected such that the second harmonic signal substantially cancels the first harmonic signal at the load terminal.

Continuity (4)
Continuation 15493255 · Apr 21, 2017
Provisional Application 62372354 · Aug 9, 2016
Provisional Application 62325643 · Apr 21, 2016
Related Publication 20190149102A1 · May 16, 2019