Semiconductor devices
Semiconductor devices are provided. The semiconductor devices may include a substrate, a device isolation pattern in the substrate to electrically isolate a first pixel and a second pixel from each other, a conductive pattern in the device isolation pattern, and a doping layer on a side surface of the device isolation pattern. The doping layer may have a conductivity type different from a conductivity type of the substrate.
1. A semiconductor device comprising:
a substrate;
an insulative isolation pattern in the substrate, the insulative isolation pattern electrically isolating a first pixel and a second pixel from each other;
a conductive pattern in the insulative isolation pattern;
a doped layer on a side surface of the insulative isolation pattern;
a photoelectric conversion layer that is on a first surface of the substrate and overlaps the first pixel and the second pixel; and
color filters between the substrate and the photoelectric conversion layer,
wherein the doped layer has a conductivity type different from that of the substrate.
2. The semiconductor device of claim 1 , further comprising a first interconnection pattern on a second surface of the substrate and electrically connected to the doped layer.
3. The semiconductor device of claim 2 , wherein the first interconnection pattern is connected to a voltage source that is configured to apply a positive voltage to the first interconnection pattern.
4. The semiconductor device of claim 1 , further comprising a lower electrode pattern between the substrate and the photoelectric conversion layer,
wherein the lower electrode pattern is electrically connected to the conductive pattern.
5. The semiconductor device of claim 1 , further comprising:
a floating diffusion region in the substrate; and
a second interconnection pattern on a second surface of the substrate and electrically connects the conductive pattern to the floating diffusion region.
6. The semiconductor device of claim 1 , wherein the doped layer directly contacts the substrate and the insulative isolation pattern.
7. The semiconductor device of claim 1 , wherein the doped layer is an n-type doped layer.
8. The semiconductor device of claim 1 , further comprising first and second photoelectric conversion regions in the first and second pixels, respectively, and in the substrate.
9. A semiconductor device comprising:
a substrate of a first conductivity type, the substrate including a first surface and a second surface opposite the first surface;
a device isolation pattern in the substrate, the device isolation pattern comprising a conductive pattern and an insulating pattern;
a charge-trapping pattern on a side surface of the device isolation pattern, the charge-trapping pattern comprising impurities having a second conductivity type that is different from the first conductivity type;
an organic photoelectric conversion layer on the first surface of the substrate; and
a lower electrode pattern between the first surface of the substrate and a lower surface of the organic photoelectric conversion layer;
an upper electrode pattern on an upper surface of the organic photoelectric conversion layer; and
a second interconnection pattern on the second surface of the substrate and electrically connected to the lower electrode pattern through the conductive pattern,
wherein the insulating pattern is between the conductive pattern and the charge-trapping pattern.
10. The semiconductor device of claim 9 , further comprising a first interconnection pattern on the second surface of the substrate and electrically connected to the charge-trapping pattern.
11. The semiconductor device of claim 9 , further comprising a floating diffusion region in the substrate,
wherein the second interconnection pattern electrically connects the conductive pattern to the floating diffusion region.
12. The semiconductor device of claim 9 , wherein the substrate comprises a first photoelectric conversion region and a second photoelectric conversion region, and
wherein the organic photoelectric conversion layer is on the first photoelectric conversion region and the second photoelectric conversion region.
13. An image sensor comprising:
first and second photoelectric conversion regions in a substrate;
a device isolation pattern between the first and second photoelectric conversion regions, the device isolation pattern comprising a conductive pattern and an insulating pattern between the conductive pattern and the substrate;
a doped region between the substrate and the device isolation pattern, the doped region directly contacting the insulating pattern;
a lower electrode pattern on a first surface of the substrate and electrically connected to the conductive pattern;
a photoelectric conversion layer on the lower electrode pattern;
a first interconnection pattern on a second surface of the substrate and electrically connected to the doped region; and
a second interconnection pattern on the second surface of the substrate and electrically connected to the conductive pattern.
14. The image sensor of claim 13 , wherein the substrate has a first conductivity type, and
wherein the doped region has a second conductivity type different from the first conductivity type.
15. The image sensor of claim 13 , wherein the first interconnection pattern electrically connects the doped region to a voltage source, and
wherein the voltage source is configured to apply a ground voltage or a positive voltage to the first interconnection pattern.
16. The image sensor of claim 13 , wherein the photoelectric conversion layer comprises a p-type organic semiconductor material and an n-type organic semiconductor material, and
wherein the photoelectric conversion layer overlaps the first and second photoelectric conversion regions.