IP Library › Granted Patent US 10,714,607
Granted Patent B1
US 10,714,607 · App. 16/294,893 · Granted Jul 14, 2020

High electron mobility transistor

Inventors: Huai-Tzu Chiang (Tainan, TW); Sheng-Hao Lin (Hsinchu County, TW); Kuan-Hung Liu (New Taipei, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/7786H01L29/207
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Quick Facts
Patent No.
US 10,714,607
App. No.
16/294,893
Granted
Jul 14, 2020
Kind
B1
Abstract

According to an embodiment of the present invention, a high electron mobility transistor (HEMT) includes: a buffer layer on a substrate; a carrier transit layer on the buffer layer; a carrier supply layer on the carrier transit layer; a gate electrode on the carrier supply layer; and a source and a drain adjacent to two sides of the gate electrode. Preferably, the carrier supply layer comprises a concentration gradient of aluminum (Al).

Claims (28)

1. A high electron mobility transistor (HEMT), comprising:

a buffer layer on a substrate;

a carrier transit layer on the buffer layer;

a carrier supply layer on the carrier transit layer, wherein the carrier supply layer comprises a concentration gradient of aluminum (Al) and a concentration of Al decreases toward a boundary between the carrier transit layer and the carrier supply layer;

a gate electrode on the carrier supply layer; and

a source electrode and a drain electrode adjacent to two sides of the gate electrode.

2. The HEMT of claim 1 , wherein the buffer layer comprises gallium nitride (GaN).

3. The HEMT of claim 1 , wherein the carrier transit layer comprises unintentionally doped (UID) GaN.

4. The HEMT of claim 1 , wherein the carrier supply layer comprises n-type Al x Ga 1-x N.

5. The HEMT of claim 1 , wherein the carrier supply layer is doped with silicon or germanium.

6. The HEMT of claim 1 , wherein carrier supply layer comprises an epitaxial layer.

7. The HEMT of claim 1 , wherein bottom surfaces of the carrier supply layer and the source electrode and the drain electrode are coplanar.

8. A high electron mobility transistor (HEMT), comprising:

a buffer layer on a substrate;

a carrier transit layer on the buffer layer;

a carrier supply layer on the carrier transit layer;

a gate electrode on the carrier supply layer, wherein the gate electrode comprises a top portion and a bottom portion, the top portion and the bottom portion comprise different materials, and the top portion comprises metal and the bottom portion comprises an epitaxial layer; and

a source electrode and a drain electrode adjacent to two sides of the gate electrode.

9. The HEMT of claim 8 , wherein the buffer layer comprises gallium nitride (GaN).

10. The HEMT of claim 8 , wherein the carrier transit layer comprises unintentionally doped (UID) GaN.

11. The HEMT of claim 8 , wherein the carrier supply layer comprises n-type Al x Ga 1-x N.

12. The HEMT of claim 8 , wherein the carrier supply layer is doped with silicon or germanium.

13. The HEMT of claim 8 , wherein the carrier supply layer comprises an epitaxial layer.

14. The HEMT of claim 8 , wherein the bottom portion comprises p-type Al y Ga 1-y N.

15. The HEMT of claim 8 , wherein the bottom portion is doped with Mg or Zn.

16. The HEMT of claim 8 , wherein a thickness of the bottom portion is less than a thickness of the top portion.

17. The HEMT of claim 8 , wherein a sidewall of the top portion is aligned with a sidewall of the bottom portion.

18. The HEMT of claim 8 , wherein bottom surfaces of the carrier supply layer and the source electrode and the drain electrode are coplanar.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2019
From: CHIANG, HUAI-TZU; LIN, SHENG-HAO; LIU, KUAN-HUNG
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 048524/0515 →
Priority Claims (1)
CN 2019 1 0103281 · Feb 1, 2019 · national
Cited By (2)
US 12,266,696 US 12,389,624