Nonvolatile memory device and read and copy-back methods thereof

1. A copy-back method of a nonvolatile memory device including an on-chip error correcting circuit (FCC) and an on-chip randomizer, the method comprising:

sensing source data from a source area of the nonvolatile memory device to store the sensed source data into a page buffer;

performing an error decoding operation, by the on-chip ECC, by performing error detection on the source data to detect an error, correcting the detected error if the error is detected to generated corrected, and overwriting the page buffer with the corrected data;

receiving, by the nonvolatile memory device, supplement data for updating the source data from a source located external to the nonvolatile memory device;

randomizing, by the on-chip randomizer, the supplement data by using a source seed; and

updating the corrected data stored in the page buffer by using the randomized supplement data.

2. The method of claim 1 , wherein the supplement data is input together with an address of a destination area of the nonvolatile memory device to which the updated source data is to be copied.

3. The method of claim 1 , further comprising:

de-randomizing, at the page buffer, the source data updated with the randomized supplement data by using the source seed; and

randomizing the de-randomized data by using a destination seed corresponding to a destination area of the nonvolatile memory device.

4. The method of claim 3 , further comprising performing error correction encoding with respect to the data randomized with the destination seed.

5. The method of claim 4 , further comprising programming the data processed by the error correction encoding in the destination area.

6. The method of claim 1 , wherein the randomizing of the supplement data and updating of the source data stored in the page buffer are performed by a data part smaller than a page of the nonvolatile memory device.

7. The method of claim 6 , wherein the write unit corresponds to a number of program (NOP) units.

8. A nonvolatile memory device comprising:

a cell array including memory cells arranged in rows and columns;

a page buffer configured to write data into the cell array or sense data stored in the cell array;

a first circuit configured to randomize data to be written into the cell array, to provide the randomized data to the page buffer or de-randomize data output from the page buffer;

a second circuit configured to perform error correction decoding with respect to the sensed data to generate error correction decoded data; and

control logic configured to control the page buffer, the first circuit, and the second circuit,

wherein during a data read operation, the control logic controls the page buffer and the first circuit such that data stored in the page buffer is decoded by the second circuit and such that the error correction decoded data is overwritten onto the page buffer and controls the first circuit such that a de-randomization operation is performed when the data overwritten onto the page buffer is output.

9. The nonvolatile memory device of claim 6 , wherein during decoding, the second circuit corrects a data part in the page buffer having an error and overwrites the page buffer with the corrected data part.

10. The nonvolatile memory device of claim 9 , wherein the control logic controls the first circuit such that the de-randomization operation is activated when a read enable signal is activated.

11. The nonvolatile memory device of claim 10 , wherein the control logic is configured to perform a copy-back operation by randomizing supplement data input from an source located external to the nonvolatile memory device using a source seed corresponding to source data stored in the cell array, copying the source data the cell array to the page buffer, and updating the source data stored in the page buffer by using the randomized supplement data.

12. The nonvolatile memory device of claim 8 , wherein each of the memory cells comprises a charge trap layer and the cell array is a three-dimensional memory array.