Method of manufacturing a field effect transistor using carbon nanotubes and a field effect transistor

1. A method of forming a gate-all-around field effect transistor (GAA FET), the method comprising:

forming a support layer made of a support material in which carbon nanotubes (CNTs) are horizontally and vertically embedded, over a substrate;

forming a fin structure by patterning the support layer such that the fin structure includes CNTs embedded in the support material;

forming a sacrificial gate structure over the fin structure;

forming a dielectric layer over the sacrificial gate structure and the fin structure;

removing the sacrificial gate structure so that a part of the fin structure is exposed;

removing the support material from the exposed part of the fin structure so that channel regions of CNTs are exposed; and

forming a gate structure around the exposed channel regions of CNTs.

2. The method of claim 1 , wherein the support material includes a polycrystalline or amorphous material of one of Si, Ge and SiGe.

3. The method of claim 1 , wherein the support material includes a dielectric material different from the dielectric layer.

4. The method of claim 1 , further comprising:

forming an opening in the dielectric layer and the support material so that source/drain regions of the CNTs are exposed; and

forming one or more conductive layers in the opening around the exposed source/drain regions of the CNTs.

5. The method of claim 1 , wherein in the fin structure, two CNTs among the CNTs contact each other in a horizontal direction, and no CNT contacts another CNT in a vertical direction.

6. The method of claim 1 , wherein the gate structure includes a gate dielectric layer wrapping around each of the CNTs, a work function adjustment layer formed on the gate dielectric layer and a body gate electrode layer formed on the work function adjustment layer.

7. The method of claim 6 , wherein the work function adjustment layer partially wraps around the CNTs with the gate dielectric layer.

8. The method of claim 6 , wherein the work function adjustment layer fully wraps around each of the CNTs with the gate dielectric layer.

9. The method of claim 6 , wherein the gate dielectric layer includes one selected from the group consisting of HfO 2 and Al 2 O 3 .

10. The method of claim 6 , wherein the work function adjustment layer includes TiN.

11. The method of claim 1 , wherein the support layer is formed by a process including:

forming a bottom support layer over the substrate;

disposing first CNTs over the bottom support layer;

forming a first support layer over the first CNTs and the bottom support layer such that the first CNTs are embedded in the first support layer;

disposing second CNTs over the first support layer; and

forming a second support layer over the second CNTs and the first support layer such that the second CNTs are embedded in the second support layer.

12. The method of claim 11 , wherein forming CNTs and forming a support layer are repeated to form n support layers in which the CNTs are embedded, where n is integer of three or more.

13. The method of claim 11 , wherein the bottom support layer includes an insulating material.

14. The method of claim 11 , wherein the first support layer and the second support layer are made of a same material.

15. The method of claim 14 , wherein the bottom support layer is made of a different material than the first support layer and the second support layer.

16. A method of forming a gate-all-around field effect transistor (GAA FET), the method comprising:

forming a first fin structure and a second fin structure, in each of which carbon nanotubes (CNTs) are embedded in a support material and at least two CNTs are horizontally arranged and two or more CNTs are vertically arranged, over a substrate;

forming a sacrificial gate structure over the first and second fin structures;

forming a dielectric layer over the sacrificial gate structure and the first and second fin structures;

removing the sacrificial gate structure so that a part of the first and second fin structures is exposed;

removing the support material from the exposed part of the first and second fin structures so that channel regions of CNTs are exposed; and

forming a gate structure around the exposed channel regions of CNTs.

17. The method of claim 16 , wherein a total number of CNTs in the first fin structure is different from a total number of CNTs in the second fin structure.

18. A method of forming a gate-all-around field effect transistor (GAA FET), the method comprising:

forming a fin structure, in which carbon nanotubes (CNTs) are embedded in a support material, over a substrate;

forming a sacrificial gate structure over the fin structure;

forming gate sidewall spacers on opposing side faces of the sacrificial gate structure and a fin sidewall spacer on an end face of the fin structure;

forming a dielectric layer over the sacrificial gate structure and the fin structure;

removing the sacrificial gate structure so that a part of the fin structure is exposed;

removing the support material from the exposed part of the fin structure so that channel regions of CNTs are exposed;

forming a gate structure around the exposed channel regions of CNTs;

forming an opening in the dielectric layer and the support material so that source/drain regions of the CNTs are exposed; and

forming a source/drain contact around the exposed source/drain regions of the CNTs by forming one or more conductive layer in the opening,

wherein a part of the support material remains between the source/drain contact and the fin sidewall spacer.

19. The method of claim 18 , wherein the fin structure is formed by:

forming a support layer made of the support material in which the CNTs are horizontally and vertically embedded; and

patterning the support layer into the fin structure.

20. The method of claim 16 , wherein the first and second fin structures are formed by:

forming a support layer made of the support material in which the CNTs are horizontally and vertically embedded; and

patterning the support layer into the first and second fin structures.