Semiconductor device and manufacturing method thereof
View Patent ↗A semiconductor device includes a substrate, a first circuit, and a second circuit. The first circuit is disposed on the substrate and includes a first semiconductor fin and a first gate electrode straddling the first semiconductor fin. The second circuit is different from the first circuit and disposed on the substrate. The second circuit includes a second semiconductor fin and a second gate electrode straddling the second semiconductor fin. A width of the first semiconductor fin is different from a width of the second semiconductor fin.
1. A semiconductor device, comprising:
a substrate;
a first circuit on the substrate and comprising:
a first semiconductor fin; and
a first gate electrode straddling the first semiconductor fin; and
a second circuit, different from the first circuit, on the substrate and comprising:
a second semiconductor fin;
a second gate electrode straddling the second semiconductor fin, wherein a width of the first semiconductor fin is different from a width of the second semiconductor fin; and
a third gate electrode straddling the first and second semiconductor fins.
2. The semiconductor device of claim 1 , wherein an area of a top surface of the first semiconductor fin is different from an area of a top surface of the second semiconductor fin.
3. The semiconductor device of claim 1 , wherein a length of the first semiconductor fin is substantially equal to a length of the second semiconductor fin.
4. The semiconductor device of claim 1 , wherein the first circuit further comprises:
a first source/drain epitaxial structure on the first semiconductor fin; and
a second source/drain epitaxial structure on the second semiconductor fin, wherein a width of the first source/drain epitaxial structure is different from a width of the second source/drain epitaxial structure along a lengthwise direction of the first gate electrode or the second gate electrode.
5. The semiconductor device of claim 1 , wherein the first gate electrode comprises a first work function layer, the second gate electrode comprises a second work function layer, and a material of the first work function layer is different from a material of the second work function layer.
6. The semiconductor device of claim 1 , wherein the substrate comprises a P-type well, and the first and second semiconductor fins are disposed on the P-type well.
7. The semiconductor device of claim 1 , wherein the substrate comprises an N-type well, and the first and second semiconductor fins are disposed on the N-type well.
8. The semiconductor device of claim 1 , wherein the first circuit is one of an inverter, an NAND, an NOR, and a Flip-Flop, and the second circuit is another one of the inverter, the NAND, the NOR, and the Flip-Flop.
9. The semiconductor device of claim 1 , wherein the first semiconductor fin is in contact with the second semiconductor fin.
10. The semiconductor device of claim 1 , wherein the first and second circuits are isolated from each other.
11. A semiconductor device, comprising:
a substrate;
a first semiconductor fin on the substrate and extending along a first direction; and
first and second gate electrodes across the first semiconductor fin and extending along a second direction intersecting the first direction, wherein a first portion of the first semiconductor fin under the first gate electrode has a first width different from a second width of a second portion of the first semiconductor fin under the second gate electrode.
12. The semiconductor device of claim 11 , further comprising:
a first epitaxial structure on the first semiconductor fin and adjacent to the first gate electrode; and
a second epitaxial structure on the first semiconductor fin and adjacent to the second gate electrode, wherein a width of the first epitaxial structure is different from a width of the second epitaxial structure.
13. The semiconductor device of claim 11 , wherein the first gate electrode comprises a first work function layer, the second gate electrode comprises a second work function layer, and a material of the first work function layer is different from a material of the second work function layer.
14. The semiconductor device of claim 11 , further comprising a second semiconductor fin on the substrate and extending along the first direction, wherein the first and second gate electrodes are further across the second semiconductor fin.
15. The semiconductor device of claim 14 , wherein the substrate comprises first and second wells of opposite types, the first semiconductor fin is disposed on the first well, and the second semiconductor fin is disposed on the second well.
16. The semiconductor device of claim 1 , wherein a lengthwise direction of the first semiconductor fin is substantially the same as a lengthwise direction of the second semiconductor fin.
17. A semiconductor device, comprising:
a substrate having a first type well region;
a first transistor on the first type well region and comprising a first semiconductor fin;
a second transistor on the first type well region and comprising a second semiconductor fin that is in direct contact with the first semiconductor fin, wherein a first width of the first semiconductor fin is different from a second width of the second semiconductor fin; and
a gate structure overlapping a longitudinal end of the first semiconductor fin and a longitudinal end of the second semiconductor fin when viewed from above.
18. The semiconductor device of claim 17 , wherein the second semiconductor fin shrinks from the first semiconductor fin.
19. The semiconductor device of claim 17 , wherein the first and second semiconductor fins are aligned with each other along a lengthwise direction of the first semiconductor fin.
20. The semiconductor device of claim 17 , wherein the substrate further has a second type well region adjacent to the first type well region, and a distance between the first semiconductor fin and the second type well region is different from a distance between the second semiconductor fin and the second type well region.