IP Library › Granted Patent US 10,741,412
Granted Patent B2
US 10,741,412 · App. 16/193,433 · Granted Aug 11, 2020

Gate structure of semiconductor device

Inventors: Tsan-Chun Wang (Hsinchu, TW); Chun-Feng Nieh (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L21/3215C23C14/48H01J37/3171H01L21/02321H01L21/28176H01L21/3115H01L21/31155H01L29/4966H01L29/517H01L29/66795H01L29/7851H01L21/28088
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Quick Facts
Patent No.
US 10,741,412
App. No.
16/193,433
Granted
Aug 11, 2020
Kind
B2
Abstract

A semiconductor device and method of manufacture are provided. In some embodiments a divergent ion beam is utilized to implant ions into a capping layer, wherein the capping layer is located over a first metal layer, a dielectric layer, and an interfacial layer over a semiconductor fin. The ions are then driven from the capping layer into one or more of the first metal layer, the dielectric layer, and the interfacial layer.

Claims (34)

1. A semiconductor device comprising:

a semiconductor fin over a substrate;

an interfacial layer extending along sidewalls and a top surface of the semiconductor fin, the interfacial layer having a first concentration of a first dopant;

a dielectric layer over the interfacial layer, the dielectric layer having a second concentration of the first dopant; and

a first metal layer over the dielectric layer, the first metal layer having a third concentration of the first dopant.

2. The semiconductor device of claim 1 , wherein the first concentration of the first dopant is greater than the second concentration of the first dopant.

3. The semiconductor device of claim 1 , wherein the second concentration of the first dopant is greater than the third concentration of the first dopant.

4. The semiconductor device of claim 1 , wherein the semiconductor fin has a fourth concentration of the first dopant.

5. The semiconductor device of claim 4 , wherein the third concentration of the first dopant is greater than the fourth concentration of the first dopant.

6. The semiconductor device of claim 4 , wherein the semiconductor fin further comprises a second dopant.

7. The semiconductor device of claim 1 , further comprising an isolation region adjacent the semiconductor fin, the interfacial layer extending along a top surface of the isolation region.

8. The semiconductor device of claim 1 , wherein the first dopant is fluorine, carbon, or nitrogen.

9. A semiconductor device comprising:

a semiconductor fin over a substrate;

an interfacial layer over the semiconductor fin, the interfacial layer having a first non-zero concentration gradient of a first dopant;

a high-k dielectric layer over the interfacial layer, the high-k dielectric layer having a second non-zero concentration gradient of the first dopant; and

a first metal layer over the high-k dielectric layer, the first metal layer having a third non-zero concentration gradient of the first dopant.

10. The semiconductor device of claim 9 , wherein the first dopant is fluorine.

11. The semiconductor device of claim 9 , wherein the interfacial layer comprises silicon oxide.

12. The semiconductor device of claim 11 , wherein the high-k dielectric layer comprises hafnium oxide.

13. The semiconductor device of claim 12 , wherein the first metal layer comprises titanium nitride.

14. The semiconductor device of claim 9 , wherein the high-k dielectric layer is free from implantation damage.

15. A semiconductor device comprising:

isolation regions over a substrate;

a semiconductor fin between adjacent isolation regions;

an interfacial layer in physical contact with sidewalls and a topmost surface of the semiconductor fin;

a high-k dielectric layer over the interfacial layer;

a first metal layer over the high-k dielectric layer; and

a first dopant in the semiconductor fin, the interfacial layer, the high-k dielectric layer, and the first metal layer, wherein a concentration of the first dopant in the first metal layer-decreases along a first direction, and wherein the first direction extends from a topmost surface of the first metal layer toward the topmost surface of the semiconductor fin.

16. The semiconductor device of claim 15 , further comprising a second dopant in the semiconductor fin.

17. The semiconductor device of claim 15 , wherein a concentration of the first dopant in the high-k dielectric layer decreases along the first direction.

18. The semiconductor device of claim 15 , wherein a concentration of the first dopant in the interfacial layer decreases along the first direction.

19. The semiconductor device of claim 15 , wherein a concentration of the first dopant in the semiconductor fin decreases along the first direction.

20. The semiconductor device of claim 15 , wherein the first dopant is fluorine, carbon, or nitrogen.

Continuity (2)
Division 15687287 · Aug 25, 2017
Related Publication 20190088498A1 · Mar 21, 2019