IP Library Granted Patent US 10,746,785
Granted Patent B2
US 10,746,785 · App. 15/230,067 · Granted Aug 18, 2020

Dynamic predictor of semiconductor lifetime limits

Inventors: Chen-Yong Cher (Port Chester, NY); Keith A. Jenkins (Sleepy Hollow, NY); Barry P. Linder (Hastings-on-Hudson, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G01R31/2849G01R31/2837
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Quick Facts
Patent No.
US 10,746,785
App. No.
15/230,067
Granted
Aug 18, 2020
Kind
B2
Abstract

A method and circuit of monitoring an effective age of a target circuit are provided. A standby mode is activated in the target circuit. A standby current of a first number of circuit blocks of the target circuit is measured. The measured standby current of the first number of circuit blocks is compared to a first baseline standby current of the first number of circuit blocks. Upon determining that the measured standby current of the first number of circuit blocks is below a first predetermined factor of a baseline standby current of the first number of circuit blocks, the first number of circuit blocks is identified to have a bias temperature instability (BTI) degradation concern.

Claims (65)

1. A method of monitoring an effective age of a target circuit by a monitor circuit, the method comprising:

activating a standby mode in the target circuit;

measuring a standby current of a first number of circuit blocks of the target circuit by the monitor circuit;

comparing the measured standby current of the first number of circuit blocks to a first baseline standby current of the first number of circuit blocks; and

upon determining that the measured standby current of the first number of circuit blocks is below a first predetermined factor of the first baseline standby current of the first number of circuit blocks, identifying the first number of circuit blocks to have a bias temperature instability (BTI) degradation concern, wherein the first predetermined factor is <1,

wherein a number of circuit blocks that are included in the first number of circuit blocks is based on a predetermined current measurement sensitivity.

2. The method of claim 1 , wherein the standby mode is activated in the first number of circuit blocks of the target circuit.

3. The method of claim 2 , wherein activating the standby mode comprises at least one of:

(i) turning OFF a system clock; and

(ii) disabling any data input to the target circuit.

4. The method of claim 1 , further comprising:

measuring a standby current of a second number of circuit blocks of the target circuit;

comparing the measured standby current of the second number of circuit blocks to a second baseline standby current of the second number of circuit blocks; and

upon determining that the measured standby current of the second number of circuit blocks is above a second predetermined factor of the second baseline standby current, identifying the second number of circuit blocks to have a time dependent dielectric breakdown (TDDB) degradation concern, wherein the second predetermined factor is >1.

5. The method of claim 4 , further comprising:

measuring a noise of the standby current of the second number of circuit blocks;

comparing the measured noise of the standby current of the second number of circuit blocks to a predetermined threshold; and

upon determining that the measured noise of the standby current of the second number or circuit blocks is above the predetermined threshold, identifying the second number of circuit blocks to have the time dependent dielectric breakdown (TDDB) degradation concern.

6. The method of claim 5 , further comprising:

upon identifying that the first number of circuit blocks has the BTI degradation concern, imposing one or more restrictions on the first number of circuit blocks to prevent a premature failure of the first number of circuit blocks; and

upon identifying that the second number of circuit blocks has the TDDB degradation concern, imposing one or more restrictions on the second number of circuit blocks to prevent a premature failure of the second number of circuit blocks.

7. The method of claim 4 , wherein a number of circuit blocks that are included in the second number of circuit blocks is based on maintaining a total standby current consumption of the second number of circuit blocks below a predetermined ratio of the total standby current consumption to a target current measurement sensitivity.

8. The method of claim 7 , wherein the predetermined ratio of the total standby current consumption to the target current measurement sensitivity is at most 100:1.

9. The method of claim 4 , wherein a number of circuit blocks that are included in the first number of circuit blocks is larger than a number of circuit blocks that are included in the second number of circuit blocks.

10. The method of claim 1 , further comprising comparing a signature of a current consumption over a predetermined time period of the first number of circuit blocks to a stored aging model of the first number of circuit blocks to identify an effective age of the first number of circuit blocks.

11. The method of claim 10 , further comprising adjusting the stored aging model of the first number of circuit blocks based on a deviation between the signature of the current consumption over the predetermined time period of the first number of circuit blocks and the stored aging model of the first number of circuit blocks.

12. A method of monitoring an effective age of a target circuit by a monitor circuit, the method comprising:

activating a standby mode in the target circuit;

measuring a standby current of a second number of circuit blocks of the target circuit by the monitor circuit;

comparing the measured standby current of the second number of circuit blocks to a second baseline standby current of the second number of circuit blocks;

measuring a noise of the standby current of the second number of circuit blocks; and

upon determining that at least one of: (i) the measured standby current of the second number of circuit blocks is above a second predetermined factor of the second baseline standby current, wherein the second predetermined factor is >1, and (ii) the measured noise of the standby current of the second number or circuit blocks is above a predetermined threshold, identifying the second number of circuit blocks to have a time dependent dielectric breakdown (TDDB) degradation concern,

wherein a number of circuit blocks that are included in the second number of circuit blocks is based on a predetermined current measurement sensitivity.

13. The method of claim 12 , wherein the standby mode is activated in the second number of circuit blocks of the target circuit.

14. The method of claim 13 , wherein activating the standby mode comprises at least one of:

(iii) turning OFF a system clock; and

(iv) disabling any data input to the target circuit.

15. The method of claim 12 , further comprising:

measuring a standby current of a first number of circuit blocks of the target circuit;

comparing the measured standby current of the first number of circuit blocks to a first baseline standby current of the first number of circuit blocks; and

upon determining that the measured standby current of a first number of circuit blocks is below a first predetermined factor of the first baseline standby current of the first number of circuit blocks, identifying the first number of circuit blocks to have a bias temperature instability (BTI) degradation concern, wherein the first predetermined factor is <1.

16. The method of claim 15 , further comprising:

upon identifying that the first number of circuit blocks has the BTI degradation concern, imposing one or more restrictions on the first number of circuit blocks to prevent a premature failure of the first number of circuit blocks; and

upon identifying that the second number of circuit blocks has the TDDB degradation concern, imposing one or more restrictions on the second number of circuit blocks to prevent a premature failure of the second number of circuit blocks.

17. The method of claim 12 , wherein a number of circuit blocks that are included in the second number of circuit blocks is based on maintaining a total standby current consumption of the second number of circuit blocks below a predetermined ratio of the total standby current consumption to a target current measurement sensitivity.

18. The method of claim 17 , wherein the predetermined ratio of the total standby current consumption to the target current measurement sensitivity is at most 100:1.

19. An age monitor circuit comprising:

a controller circuit coupled to a target circuit and configured to activate a standby mode in the target circuit;

a test circuit coupled to the controller circuit;

a register circuit coupled to the test circuit; and

a predictor circuit coupled to the register circuit, wherein:

the controller circuit is configured to activate a standby mode in the target circuit and select a first number of circuit blocks of the target circuit; and

the test circuit is configured to:

measure a standby current of the first number of circuit blocks; and

store the measured standby current in the register circuit; and

the predictor circuit is configured to:

compare the measured standby current of the first number of circuit blocks to a first baseline standby current of the first number of circuit blocks provided by the register circuit; and

upon determining that the measured standby current of the first number of circuit blocks is below a first predetermined factor of a baseline standby current of the first number of circuit blocks, identify the first number of circuit blocks to have a bias temperature instability (BTI) degradation concern, wherein the first predetermined factor is <1, wherein a number of circuit blocks that are included in the first number of circuit blocks is based on a predetermined current measurement sensitivity.

20. The age monitor circuit of claim 19 , wherein:

the test circuit is further configured to:

measure a standby current of a second number of circuit blocks of the target circuit; and

measure a noise of the standby current of the second number of circuit blocks; and

the predictor circuit is configured to:

compare the measured standby current of the second number of circuit blocks to a second baseline standby current of the second number of circuit blocks provided by the register circuit; and

upon determining that at least one of: (i) the measured standby current of the second number of circuit blocks is above a second predetermined factor of the second baseline standby current, wherein the second predetermined factor is >1, and (ii) the measured noise of the standby current of the second number or circuit blocks is above a predetermined threshold, identify the second number of circuit blocks to have a time dependent dielectric breakdown (TDDB) degradation concern.

Assignments (2)
CONFIRMATORY LICENSE Recorded Sep 21, 2016
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: DARPA
Reel/Frame 040096/0216 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2016
From: CHER, CHEN-YONG; JENKINS, KEITH A.; LINDER, BARRY P.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 039358/0097 →
Continuity (1)
Related Publication 20180038906A1 · Feb 8, 2018