IP Library › Granted Patent US 10,747,810
Granted Patent B2
US 10,747,810 · App. 15/792,940 · Granted Aug 18, 2020

Low power supervised semantic-preserving shallow hashing

Inventors: Apoorv Vyas (Bangalore, IN); Darshan Mehta (Bangalore, IN); Srenivas Varadarajan (Bangalore, IN)
Assignee: Intel Corporation
G06F16/5838G06F16/583G06K9/6263G06N3/0427G06K9/6256G06T2207/20081G06T2207/20084
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Quick Facts
Patent No.
US 10,747,810
App. No.
15/792,940
Granted
Aug 18, 2020
Kind
B2
Abstract

A semiconductor package apparatus may include technology to provide an image to a low power shallow hash network, generate a hash code from the low power shallow hash network, and identify one or more similar images based on the hash code. Other embodiments are disclosed and claimed.

Claims (65)

1. An electronic processing system, comprising:

a processor;

memory communicatively coupled to the processor; and

logic communicatively coupled to the processor to:

provide an image to a low power shallow hash network,

generate a hash code from the low power shallow hash network,

identify one or more similar images based on the hash code,

provide a set of hash codes,

train a shallow neural network to provide the low power shallow hash network based on the set of hash codes as label data, and

adjust a bitwise threshold based on a match between a set of target hash codes and one or more hash codes from the shallow neural network.

2. The system of claim 1 , wherein the logic is further to:

stop the train of the shallow neural network based on a qualitative hash code evaluation criteria.

3. The system of claim 1 , wherein the logic is further to:

run two or more training epochs on the shallow neural network;

determine a mean average precision (mAP) score for each of the two or more training epochs; and

return the low power shallow hash network corresponding to a highest mean average precision mAP score.

4. The system of claim 1 , wherein the logic is further to:

train a deep neural network to generate the set of hash codes based on a set of training images.

5. A semiconductor package apparatus, comprising:

a substrate; and

logic coupled to the substrate, wherein the logic is at least partly implemented in one or more of configurable logic and fixed-functionality hardware logic, the logic coupled to the substrate to:

provide an image to a low power shallow hash network,

generate a hash code from the low power shallow hash network,

identify one or more similar images based on the hash code,

provide a set of hash codes,

train a shallow neural network to provide the low power shallow hash network based on the set of hash codes as label data, and

adjust a bitwise threshold based on a match between a set of target hash codes and one or more hash codes from the shallow neural network.

6. The apparatus of claim 5 , wherein the logic is further to:

stop the train of the shallow neural network based on a qualitative hash code evaluation criteria.

7. The apparatus of claim 5 , wherein the logic is further to:

run two or more training epochs on the shallow neural network;

determine a mean average precision (mAP) score for each of the two or more training epochs; and

return the low power shallow hash network corresponding to a highest mean average precision (mAP) score.

8. The apparatus of claim 5 , wherein the logic is further to:

train a deep neural network to generate the set of hash codes based on a set of training images.

9. A method of identifying images, comprising:

providing an image to a low power shallow hash network;

generating a hash code from the low power shallow hash network;

identifying one or more similar images based on the hash code;

providing a set of hash codes;

training a shallow neural network to provide the low power shallow hash network based on the set of hash codes as label data; and

adjusting a bitwise threshold based on a match between a set of target hash codes and one or more hash codes from the shallow neural network.

10. The method of claim 9 , further comprising:

stopping the training of the shallow neural network based on a qualitative hash code evaluation criteria.

11. The method of claim 9 , further comprising:

running two or more training epochs on the shallow neural network;

determining a mean average precision (mAP) score for each of the two or more training epochs; and

returning the low power shallow hash network corresponding to a highest mean average precision mAP score.

12. The method of claim 9 , further comprising:

training a deep neural network to generate the set of hash codes based on a set of training images.

13. At least one non-transitory computer readable medium, comprising a set of instructions, which when executed by a computing device, cause the computing device to:

provide an image to a low power shallow hash network;

generate a hash code from the low power shallow hash network;

identify one or more similar images based on the hash code;

provide a set of hash codes;

train a shallow neural network to provide the low power shallow hash network based on the set of hash codes as label data; and

adjust a bitwise threshold based on a match between a set of target hash codes and one or more hash codes from the shallow neural network.

14. The at least one non-transitory computer readable medium of claim 13 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:

stop the training of the shallow neural network based on a qualitative hash code evaluation criteria.

15. The at least one non-transitory computer readable medium of claim 13 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:

run two or more training epochs on the shallow neural network;

determine a mean average precision (mAP) score for each of the two or more training epochs; and

return the low power shallow hash network corresponding to a highest mean average precision mAP score.

16. The at least one non-transitory computer readable medium of claim 13 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:

train a deep neural network to generate the set of hash codes based on a set of training images.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2017
From: VYAS, APOORV; MEHTA, DARSHAN; VARADARAJAN, SRENIVAS
To: INTEL CORPORATION
Reel/Frame 044044/0219 →
Continuity (1)
Related Publication 20190121877A1 · Apr 25, 2019