IP Library › Granted Patent US 10,755,943
Granted Patent B2
US 10,755,943 · App. 16/221,766 · Granted Aug 25, 2020

Method for manufacturing semiconductor device

Inventors: Jung-Hao Chang (Taichung, TW); Chao-Hsien Huang (Tainan, TW); Wen-Ting Lan (Hsinchu, TW); Shi-Ning Ju (Hsinchu, TW); Li-Te Lin (Hsinchu, TW); Kuo-Cheng Ching (Hsinchu County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L21/3086H01L21/0337H01L21/31144H01L21/823431H01L29/66795
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Quick Facts
Patent No.
US 10,755,943
App. No.
16/221,766
Granted
Aug 25, 2020
Kind
B2
Abstract

A method includes forming a mandrel structure over a semiconductor substrate. A first spacer and a second spacer are formed alongside the mandrel structure. A mask layer is over a first portion of the first spacer, in which a second portion of the first spacer and the second spacer are exposed from the mask layer. The exposed second spacer is etched, in which etching the exposed second spacer is performed such that a polymer is formed over a top surface of the exposed second portion of the first spacer. The mask layer, the polymer, and the mandrel structure are removed. The semiconductor substrate is patterned using the first spacer.

Claims (41)

1. A method, comprising:

forming a mandrel structure over a semiconductor substrate;

forming a first spacer and a second spacer alongside the mandrel structure;

forming a mask layer over a first portion of the first spacer, wherein a second portion of the first spacer and the second spacer are exposed from the mask layer;

etching the exposed second spacer, wherein etching the exposed second spacer is performed such that a polymer is formed over a top surface of the second portion of the first spacer, and such that a recess is formed in the second portion of the first spacer;

removing the mask layer, the polymer, and the mandrel structure; and

patterning the semiconductor substrate using the first spacer.

2. The method of claim 1 , wherein etching the exposed second spacer is performed such that the polymer is formed on a sidewall of the mandrel structure facing the first spacer.

3. The method of claim 1 , wherein etching the exposed second spacer is performed such that the polymer is formed on a sidewall of the mask layer adjacent to the second portion of the first spacer.

4. The method of claim 1 , wherein etching the exposed second spacer is performed prior to removing the mandrel structure.

5. The method of claim 1 , wherein etching the exposed second spacer is performed such that the recess is filled with the polymer.

6. The method of claim 1 , wherein etching the exposed second spacer is performed such that the polymer is formed on a sidewall of the mandrel structure facing away from the first spacer.

7. The method of claim 1 , wherein etching the exposed second spacer is performed such that the polymer is formed over a top surface of the mandrel structure.

8. A method, comprising:

forming a first mandrel structure over a semiconductor substrate;

forming a first spacer and a second spacer alongside the first mandrel structure;

forming a mask layer over a first portion of the first spacer, wherein a second portion of the first spacer and the second spacer are exposed from the mask layer;

etching the exposed second spacer and the second portion of the first spacer to lower a top surface of the second portion of the first spacer and to expose a sidewall of the first portion of the first spacer, wherein etching the exposed second spacer and the second portion of the first spacer is performed such that a polymer is formed on a top surface of the second portion of the first spacer and on the exposed sidewall of the first portion of the first spacer;

removing the mask layer, the polymer, and the first mandrel structure; and

patterning the semiconductor substrate using the first spacer.

9. The method of claim 8 , wherein etching the exposed second spacer is performed such that the polymer is formed on a sidewall of the first mandrel structure facing the first spacer.

10. The method of claim 8 , wherein etching the exposed second spacer is performed such that the polymer is formed over a top surface of the mask layer.

11. The method of claim 8 , further comprising:

forming a second mandrel structure alongside the second spacer.

12. The method of claim 11 , further comprising:

etching the exposed second spacer is performed such that the polymer is formed on a sidewall of the second mandrel structure facing the first mandrel structure.

13. The method of claim 8 , wherein etching the exposed second spacer is performed using carbon tetrafluoride (CF 4 ) and oxygen.

14. The method of claim 8 , wherein etching the exposed second spacer is performed using boron trichloride (BCl 3 ) and hydrogen.

15. A method, comprising:

forming a mandrel structure over a semiconductor substrate;

forming a first spacer and a second spacer alongside the mandrel structure;

forming a mask layer over a first portion of the first spacer, wherein a second portion of the first spacer and the second spacer are exposed from the mask layer;

etching the exposed second spacer, wherein etching the exposed second spacer is performed such that a polymer is formed on a top surface of the second portion of the first spacer and between the first portion of the first spacer and the mandrel structure;

removing the mask layer, the polymer, and the mandrel structure; and

patterning the semiconductor substrate using the first spacer.

16. The method of claim 15 , wherein etching the exposed second spacer is performed such that the polymer is formed on opposite sidewalls of the mandrel structure.

17. The method of claim 15 , further comprising:

forming an etching stop layer over the semiconductor substrate prior to forming the mandrel structure.

18. The method of claim 15 , wherein etching the exposed second spacer is performed using carbon tetrafluoride (CF 4 ) and methane (CH 4 ).

19. The method of claim 15 , wherein etching the exposed second spacer is performed using nitrogen trifluoride (NF 3 ) and methane (CH 4 ).

20. The method of claim 15 , wherein etching the exposed second spacer is performed such that the second portion of the first spacer is recessed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2018
From: CHANG, JUNG-HAO; HUANG, CHAO-HSIEN; LAN, WEN-TING; JU, SHI-NING; LIN, LI-TE; CHING, KUO-CHENG
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 047791/0753 →
Continuity (2)
Continuation 15794262 · Oct 26, 2017
Related Publication 20190139777A1 · May 9, 2019